PIC24F08KA102-E/ML Microchip Technology, PIC24F08KA102-E/ML Datasheet - Page 183
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PIC24F08KA102-E/ML
Manufacturer Part Number
PIC24F08KA102-E/ML
Description
8KB Flash, 1.5KB RAM, 512B EEPROM, 16 MIPS, 24 I/O,16-bit PIC24F Family, NanoWat
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheet
1.MA240017.pdf
(254 pages)
Specifications of PIC24F08KA102-E/ML
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (2.75K x 24)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
PIC24F
Core
PIC
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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REGISTER 23-1:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11-10
bit 9
bit 8
bit 7-6
bit 5
bit 4
bit 3-2
bit 1-0
EVPOL1
R/W-0
R/W-0
CON
CON: Comparator Enable bit
1 = Comparator is enabled
0 = Comparator is disabled
COE: Comparator Output Enable bit
1 = Comparator output is present on the CxOUT pin
0 = Comparator output is internal only
CPOL: Comparator Output Polarity Select bit
1 = Comparator output is inverted
0 = Comparator output is not inverted
CLPWR: Comparator Low-Power Mode Select bit
1 = Comparator operates in Low-Power mode
0 = Comparator does not operate in Low-Power mode
Unimplemented: Read as ‘0’
CEVT: Comparator Event bit
1 = Comparator event defined by EVPOL<1:0> has occurred; subsequent triggers and interrupts are
0 = Comparator event has not occurred
COUT: Comparator Output bit
When CPOL = 0:
1 = V
0 = V
When CPOL = 1:
1 = V
0 = V
EVPOL<1:0>: Trigger/Event/Interrupt Polarity Select bits
11 = Trigger/event/interrupt generated on any change of the comparator output (while CEVT = 0)
10 = Trigger/event/interrupt generated on transition of the comparator output:
01 = Trigger/event/interrupt generated on transition of comparator output:
00 = Trigger/event/interrupt generation is disabled
Unimplemented: Read as ‘0’
CREF: Comparator Reference Select bits (non-inverting input)
1 = Non-inverting input connects to internal CV
0 = Non-inverting input connects to CxINA pin
Unimplemented: Read as ‘0’
CCH<1:0>: Comparator Channel Select bits
11 = Inverting input of comparator connects to V
10 = Inverting input of comparator connects to CxIND pin
01 = Inverting input of comparator connects to CxINC pin
00 = Inverting input of comparator connects to CxINB pin
EVPOL0
R/W-0
R/W-0
COE
disabled until the bit is cleared
If CPOL = 0 (non-inverted polarity):
High-to-low transition only.
If CPOL = 1 (inverted polarity):
Low-to-high transition only.
If CPOL = 0 (non-inverted polarity):
Low-to-high transition only.
If CPOL = 1 (inverted polarity):
High-to-low transition only.
IN
IN
IN
IN
CMxCON: COMPARATOR x CONTROL REGISTERS
+ > V
+ < V
+ < V
+ > V
IN
IN
IN
IN
W = Writable bit
‘1’ = Bit is set
-
-
-
-
R/W-0
CPOL
U-0
—
CLPWR
R/W-0
R/W-0
CREF
Preliminary
PIC24F16KA102 FAMILY
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
REF
BG
U-0
U-0
—
—
/2
voltage
U-0
U-0
—
—
x = Bit is unknown
R/W-0
R/W-0
CCH1
CEVT
DS39927B-page 181
COUT
R/W-0
CCH0
R-0
bit 8
bit 0
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