USB3320C-EZK-TR Standard Microsystems (SMSC), USB3320C-EZK-TR Datasheet - Page 23

• Manufacturer Part Number: USB3320C-EZK-TR
• Manufacturer: Standard Microsystems (SMSC)

Specifications of USB3320C-EZK-TR

• Number Of Transceivers: 1
• Esd Protection: YeskV
• Operating Supply Voltage (typ): Not RequiredV
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): Not RequiredV
• Operating Supply Voltage (min): Not RequiredV
• Pin Count: 32
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Lead Free Status / RoHS Status: Compliant

Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver
Datasheet
Chapter 5 Architecture Overview
SMSC USB3320
5.1
5.2
5.2.1
The USB3320 consists of the blocks shown in the diagram below. All pull-up resistors shown in this
diagram are connected internally to the VDD33 pin.
This section of the USB3320 is covered in detail in
The blocks in the lower left-hand corner of
USB Transceiver
The USB3320 includes the receivers and transmitters that are compliant to the Universal Serial Bus
Specification Rev 2.0. The DP/DM signals in the USB cable connect directly to the receivers and
transmitters.
The RX block consists of a differential receiver for HS and separate receivers for FS/LS mode.
Depending on the mode, the selected receiver provides the serial data stream through the multiplexer
to the RX Logic block. For HS mode support, the HS RX block contains a squelch circuit to insure that
noise is not interpreted as data. The RX block also includes a single-ended receiver on each of the
data lines to determine the correct FS linestate.
Data from the TX Logic block is encoded, bit stuffed, serialized and transmitted onto the USB cable
by the TX block. Separate differential FS/LS and HS transmitters are included to support all modes.
The USB3320 TX block meets the HS signalling level requirements in the USB 2.0 Specification when
the PCB traces from the DP and DM pins to the USB connector have very little loss. In some systems,
ULPI Digital Operation and Interface
USB 2.0 Hi-Speed Transceiver
SPK_R
VDD33
SPK_L
CPEN
VBUS
VBAT
DM
DP
ID
OVP
Figure 5.1 USB3320 Internal Block Diagram
LDO
VDD33
VDD33
VDD33
DATASHEET
DrvVbus or’d with DrvVbusExternal
23
VbusValid
RX
Rid Value
SessValid
SessEnd
Figure 5.1
IdFloat
IdGnd
TX
Chapter 6, ULPI
RX Decoding
TX Encoding
interface to the DP/DM pins.
HS/FS/LS
HS/FS/LS
Digitial
ULPI
Operation.
Integrated
Low Jitter
BIAS
PLL
Revision 1.0 (07-14-09)
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
STP
NXT
DIR
CLKOUT
RESETB
VDDIO
VDD18
REFCLK
XO
REFSEL0
REFSEL1
REFSEL2
RBIAS