USB3320C-EZK-TR Standard Microsystems (SMSC), USB3320C-EZK-TR Datasheet - Page 63

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USB3320C-EZK-TR

Manufacturer Part Number
USB3320C-EZK-TR
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of USB3320C-EZK-TR

Number Of Transceivers
1
Esd Protection
YeskV
Operating Supply Voltage (typ)
Not RequiredV
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
Not RequiredV
Operating Supply Voltage (min)
Not RequiredV
Pin Count
32
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Lead Free Status / RoHS Status
Compliant

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Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver
Datasheet
SMSC USB3320
7.1.1.5
7.1.1.6
FIELD NAME
Product ID High
FIELD NAME
XcvrSelect[1:0]
TermSelect
OpMode
Reset
SuspendM
Reserved
FIELD NAME
6-pin FsLsSerialMode
3-pin FsLsSerialMode
CarkitMode
Function Control
Address = 04-06h (read), 04h (write), 05h (set), 06h (clear)
Interface Control
Address = 07-09h (read), 07h (write), 08h (set), 09h (clear)
BIT
BIT
BIT
7:0
1:0
4:3
2
5
6
7
0
1
2
ACCESS
ACCESS
ACCESS
rd/w/s/c
rd/w/s/c
rd/w/s/c
rd/w/s/c
rd/w/s/c
rd/w/s/c
rd/w/s/c
rd/w/s/c
rd
rd
DEFAULT
DEFAULT
DEFAULT
DATASHEET
00h
01b
00b
0b
0b
1b
0b
0b
0b
0b
63
DESCRIPTION
SMSC Product ID
DESCRIPTION
Selects the required transceiver speed.
00b: Enables HS transceiver
01b: Enables FS transceiver
10b: Enables LS transceiver
11b: Enables FS transceiver for LS packets (FS
preamble automatically pre-pended)
Controls the DP and DM termination depending on
XcvrSelect, OpMode, DpPulldown, and DmPulldown.
The DP and DM termination is detailed in
Selects the required bit encoding style during
transmit.
00b: Normal Operation
01b: Non-Driving
10b: Disable bit-stuff and NRZI encoding
11b: Reserved
Active high transceiver reset. This reset does not
reset the ULPI interface or register set. Automatically
clears after reset is complete.
Active low PHY suspend. When cleared the
transceiver will enter Low Power Mode as detailed in
6.3. Automatically set when exiting Low Power Mode.
Read only, 0.
DESCRIPTION
When asserted the ULPI interface is redefined to the
6-pin Serial Mode. The transceiver will automatically
clear this bit when exiting serial mode.
When asserted the ULPI interface is redefined to the
3-pin Serial Mode. The transceiver will automatically
clear this bit when exiting serial mode.
When asserted the ULPI interface is redefined to the
Carkit interface. The transceiver will automatically
clear this bit when exiting Carkit Mode.
Revision 1.0 (07-14-09)
Table
5.1.

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