ISP1508BET STEricsson, ISP1508BET Datasheet - Page 11

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ISP1508BET

Manufacturer Part Number
ISP1508BET
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1508BET

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NXP Semiconductors
ISP1508A_ISP1508B_2
Product data sheet
7.10 REG3V3 and REG1V8
7.11 XTAL1 and XTAL2
These are output voltage pins from the internal regulator. These supplies are used
internally to power digital and analog circuits.
For proper operation of the regulator, REG3V3 and REG1V8 must each be connected to a
0.1 F capacitor in parallel with a 4.7 F low ESR capacitor.
REG3V3 powers on-chip pads of the following pins:
XTAL1 is the crystal oscillator input, and XTAL2 is the crystal oscillator output. The
allowed crystal or clock frequency on the XTAL1 pin is selectable by the CFG1 and CFG2
pins, as shown in
Table 5.
CFG1
0
Fig 3.
CFG0
DM
DP
FAULT
ID
PSW_N
RREF
V
BUS
Allowed crystal or clock frequency on the XTAL1 pin
pin internal pull-up and pull-down scheme
CFG2
0
Table
Rev. 02 — 13 March 2008
V
comparators
5.
BUS
Allowed crystal or clock frequency on the XTAL1 pin
19.2 MHz
R UP(VBUS)
R DN(VBUS)
DISCHRG_
VBUS
CHRG_VBUS
ISP1508A; ISP1508B
R I(idle)(VBUS)
ISP1508
004aaa909
ULPI HS USB OTG transceiver
REG3V3
V
BUS
© NXP B.V. 2008. All rights reserved.
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