LTC4225CGN-1#TRPBF Linear Technology, LTC4225CGN-1#TRPBF Datasheet - Page 10

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LTC4225CGN-1#TRPBF

Manufacturer Part Number
LTC4225CGN-1#TRPBF
Description
Manufacturer
Linear Technology
Datasheet

Specifications of LTC4225CGN-1#TRPBF

Lead Free Status / RoHS Status
Compliant
applicaTions inForMaTion
LTC4225-1/LTC4225-2
High availability systems often employ parallel-connected
power supplies or battery feeds to achieve redundancy
and enhance system reliability. Power ORing diodes are
commonly used to connect these supplies at the point of
load, but at the expense of power loss due to significant
diode forward voltage drop. The LTC4225 minimizes this
power loss by using external N-channel MOSFETs for the
pass elements, allowing for a low voltage drop from the
supply to the load when the MOSFETs are turned on. When
an input source voltage drops below the output common
supply voltage, the appropriate MOSFET is turned off,
thereby matching the function and performance of an ideal
diode. By adding a current sense resistor and configuring
two MOSFETs back-to-back with separate gate control, the
LTC4225 enhances the ideal diode performance with inrush
current limiting and overcurrent protection (see Figure 1).
This allows the boards to be safely inserted and removed
from a live backplane without damaging the connector.
Internal V
The LTC4225 can operate with input supplies from 2.9V
to 18V at the IN pins. The power supply to the device is
internally regulated at 5V by a low dropout regulator (LDO)
with an output at the INTV
10
CC
V
V
12V
12V
IN1
IN2
Supply
137k
137k
20k
20k
R2
R1
R3
R4
C
10nF
C
10nF
F1
F2
BULK
SUPPLY
BYPASS
CAPACITOR
BULK
SUPPLY
BYPASS
CAPACITOR
C1
0.1µF
CC
ON1
INTV
GND
ON2
Figure 1. µTCA Application Supplying 12V Power to Two µTCA Slots
CPO1
CPO2
pin. An internal diode-OR
CC
C
0.1µF
C
0.1µF
CP1
CP2
IN1
IN2
0.004
0.004
R
R
S1
S2
SENSE1 DGATE1
SENSE2 DGATE2
Si7336ADP
Si7336ADP
LTC4225
M
M
D1
D2
Si7336ADP
Si7336ADP
HGATE1
HGATE2
M
M
H1
H2
R
10
R
10
H1
H2
circuit selects the highest of the supplies at the IN and OUT
pins to power the device through the LDO. The diode-OR
scheme permits the device’s power to be temporarily kept
alive by the OUT load capacitance when the IN supplies
have collapsed or shut off.
An undervoltage lockout circuit prevents all of the MOSFETs
from turning on until the INTV
0.1µF capacitor is recommended between the INTV
GND pins, close to the device for bypassing. No external
supply should be connected at the INTV
to affect the LDO’s operation. A small external load of less
than 500µA can be connected at the INTV
Turn-On Sequence
The board power supply at the OUT pin is controlled with
two external back-to-back N-channel MOSFETs (M
The MOSFET M
diode, while M
trolling the power supplied to the output load. The sense
resistor, R
detection. The HGATE capacitor, C
slew rate to limit the inrush current. Resistor R
compensates the current control loop, while R
high frequency oscillations in the Hot Swap MOSFET.
R
47
HG2
C
15nF
R
47
HG2
HG1
C
15nF
PWRGD2
PWRGD1
HG1
FAULT1
FAULT2
OUT1
OUT2
TMR1
TMR2
EN2
EN1
S
, monitors the load current for overcurrent
R5
100k
R7
100k
H
C
47nF
D
T2
on the load side acts as a Hot Swap con-
V
V
IN1
IN2
on the supply side functions as an ideal
R6
100k
R8
100k
C
47nF
T1
BACKPLANE
CC
PLUG-IN
PLUG-IN
CARD 1
CARD 2
voltage exceeds 2.2V. A
HG
+
, controls the gate
422512 F01
+
CC
C
1600µF
C
1600µF
CC
L1
L2
12V
7.6A
12V
7.6A
pin so as not
pin.
HG
H
prevents
with C
D
CC
, M
422512f
and
H
HG
).

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