LTC4225CGN-1#TRPBF Linear Technology, LTC4225CGN-1#TRPBF Datasheet - Page 13

• Manufacturer Part Number: LTC4225CGN-1#TRPBF
• Manufacturer: Linear Technology

Specifications of LTC4225CGN-1#TRPBF

• Lead Free Status / RoHS Status: Compliant

applicaTions inForMaTion
Active Current Loop Stability
The active current loop on the HGATE pin is compensated
by the parasitic gate capacitance of the external N-channel
MOSFET. No further compensation components are nor-
mally required. In the case when a MOSFET with C
2nF is chosen, an R
connected at the HGATE pin may be required. The value
of C
the output load capacitance. The resistor, R
in series with C
for active current limiting after a fast gate pull-down due
to an output short. The value of C
and R
performance.
TMR Pin Functions
An external capacitor, C
GND serves as fault filtering when the supply output is in
active current limit. When the voltage across the sense
resistor exceeds the circuit breaker trip threshold (50mV),
TMR pulls up with 100µA. Otherwise, it pulls down with 2µA.
The fault filter times out when the 1.235V TMR threshold
is exceeded, causing the corresponding FAULT pin to pull
low. The fault filter delay or circuit breaker time delay is:
After the circuit breaker timeout, the TMR pin capacitor
pulls down with 2µA from the 1.235V TMR threshold
until it reaches 0.2V. Then, it completes 14 cooling cycles
consisting of the TMR pin capacitor charging to 1.235V
with a 100µA current and discharging to 0.2V with a 2µA
current. At that point, the HGATE pin voltage is allowed to
start up if the fault has been cleared as described in the
Resetting Faults section. When the latched fault is cleared
during the cool-off period, the corresponding FAULT pin
pulls high. The total cool-off time for the MOSFET after
an overcurrent fault is:
If the latched fault is not cleared after the cool-off period,
the cooling cycles continue until the fault is cleared.
After the cool-off period, the HGATE pin is only allowed to
pull up if the fault has been cleared for the latch-off part
t
t
CB
COOL
HG
HG
= C
is selected based on the inrush current allowed for
= C
should be between 10Ω and 100Ω for optimum
T
• 12[ms/µF]
T
• 11[s/µF]
HG
accelerates the MOSFET gate recovery
HG
T
and C
, connected from the TMR pin to
HG
compensation network
HG
should be ≤100nF
HG
, connected
ISS
≤
(LTC4225-1). For the auto-retry part (LTC4225-2), the
latched fault is cleared automatically following the cool-off
period and the HGATE pin voltage is allowed to restart.
Resetting Faults (LTC4225-1)
For the latch-off part (LTC4225-1), an overcurrent fault
is latched after tripping the circuit breaker, and the cor-
responding FAULT pin is asserted low. If the LTC4225
controls the MOSFETs on two supplies, only the Hot Swap
MOSFET on the supply at fault is turned off and the other
is not affected.
To reset a latched fault and restart the output, pull the
corresponding ON pin below 0.6V for more than 100µs
and then high above 1.235V. The fault latches reset and
the FAULT pin deasserts on the falling edge of the ON pin.
When ON goes high again, a 100ms debounce cycle is
initiated before the HGATE pin voltage restarts. Toggling
the EN pin high and then low again also resets a fault,
but the FAULT pin pulls high at the end of the 100ms
debounce cycle before the HGATE pin voltage starts up.
Bringing all the supplies below the INTV
lockout threshold (2.2V) shuts off all the MOSFETs and
resets all the fault latches. A 100ms debounce cycle is
initiated before a normal start-up when any of the supplies
is restored above the INTV
Auto-Retry after a Fault (LTC4225-2)
For the auto-retry part (LTC4225-2), the latched fault is reset
automatically after a cool-off timing cycle as described in
the TMR Pin Functions section. At the end of the cool-off
period, the fault latch is cleared and FAULT pulls high. The
HGATE pin voltage is allowed to start up and turn on the
Hot Swap MOSFET. If the output short persists, the supply
powers up into a short with active current limiting until
the circuit breaker times out and FAULT again pulls low. A
new cool-off cycle begins with TMR ramping down with
a 2µA current. The whole process repeats itself until the
output short is removed. Since t
tion of TMR capacitance, C
equal to 0.1%, irrespective of C
fault.
Figure 6 shows an auto-retry sequence after an overcurrent
LTC4225-1/LTC4225-2
CC
T
, the auto-retry duty cycle is
UVLO threshold.
T
CB
.
and t
CC
COOL
undervoltage
are a func-
13
422512f