MT47H128M16RT-25E:C Micron Technology Inc, MT47H128M16RT-25E:C Datasheet - Page 127

• Manufacturer Part Number: MT47H128M16RT-25E:C
• Description: DRAM Chip DDR2 SDRAM 2G-Bit 128Mx16 1.8V 84-Pin FBGA Tray
• Manufacturer: Micron Technology Inc
• Type: DDR2 SDRAMr
• Series: -r

Specifications of MT47H128M16RT-25E:C

• Package: 84FBGA
• Density: 2 Gb
• Address Bus Width: 17 Bit
• Operating Supply Voltage: 1.8 V
• Maximum Clock Rate: 800 MHz
• Maximum Random Access Time: 0.4 ns
• Operating Temperature: 0 to 70 °C
• Format - Memory: RAM
• Memory Type: DDR2 SDRAM
• Memory Size: 2G (128M x 16)
• Speed: 2.5ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Package / Case: 84-TFBGA
• Lead Free Status / RoHS Status: Compliant

Figure 80: RESET Function
PDF: 09005aef824f87b6
2gbddr2.pdf – Rev. E 06/10 EN
Bank address
Command
Address
ODT
DQS 3
DM 3
CK#
CKE
A10
DQ 3
R
CK
TT
Bank a
READ
Col n
T0
High-Z
High-Z
Notes:
NOP 2
T1
1. V
2. Either NOP or DESELECT command may be applied.
3. DM represents DM for x4/x8 configuration and UDM, LDM for x16 configuration. DQS
4. In certain cases where a READ cycle is interrupted, CKE going HIGH may result in the
5. Initialization timing is shown in Figure 43 (page 88).
represents DQS, DQS#, UDQS, UDQS#, LDQS, LDQS#, RDQS, and RDQS# for the appropri-
ate configuration (x4, x8, x16).
completion of the burst.
DD
Bank b
Col n
READ
, V
T2
DDL
, V
DDQ
NOP 2
Indicates a break in
time scale
T3
, V
DO
TT
, and V
DO
NOP 2
T4
127
System
DO
RESET
REF
must be valid at all times.
t DELAY
Unknown
T5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
1
2Gb: x4, x8, x16 DDR2 SDRAM
R
TT
On
High-Z
High-Z
Transitioning Data
t CL
© 2006 Micron Technology, Inc. All rights reserved.
t CK
Start of normal 5
initialization
t CL
sequence
NOP 2
Ta0
4
T = 400ns (MIN)
t CKE (MIN)
All banks
Tb0
PRE
Don’t Care
High-Z
t RPA
Reset