MT47H128M16RT-25E:C Micron Technology Inc, MT47H128M16RT-25E:C Datasheet - Page 18

• Manufacturer Part Number: MT47H128M16RT-25E:C
• Description: DRAM Chip DDR2 SDRAM 2G-Bit 128Mx16 1.8V 84-Pin FBGA Tray
• Manufacturer: Micron Technology Inc
• Type: DDR2 SDRAMr
• Series: -r

Specifications of MT47H128M16RT-25E:C

• Package: 84FBGA
• Density: 2 Gb
• Address Bus Width: 17 Bit
• Operating Supply Voltage: 1.8 V
• Maximum Clock Rate: 800 MHz
• Maximum Random Access Time: 0.4 ns
• Operating Temperature: 0 to 70 °C
• Format - Memory: RAM
• Memory Type: DDR2 SDRAM
• Memory Size: 2G (128M x 16)
• Speed: 2.5ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Package / Case: 84-TFBGA
• Lead Free Status / RoHS Status: Compliant

Table 3: FBGA 84-Ball – x16 and 60-Ball – x4, x8 Descriptions (Continued)
PDF: 09005aef824f87b6
2gbddr2.pdf – Rev. E 06/10 EN
UDQS, UDQS#
RDQS, RDQS#
LDQS, LDQS#
DQS, DQS#
Symbol
V
V
V
V
V
RFU
V
V
NC
NU
NU
NF
DDQ
SSDL
DDL
REF
SSQ
DD
SS
Output
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Type
I/O
I/O
I/O
–
–
–
–
–
Description
Data strobe: Output with read data, input with write data for source synchronous oper-
ation. Edge-aligned with read data, center-aligned with write data. DQS# is only used
when differential data strobe mode is enabled via the LOAD MODE command.
Data strobe for lower byte: Output with read data, input with write data for source
synchronous operation. Edge-aligned with read data, center-aligned with write data.
LDQS# is only used when differential data strobe mode is enabled via the LOAD MODE
command.
Data strobe for upper byte: Output with read data, input with write data for source
synchronous operation. Edge-aligned with read data, center-aligned with write data.
UDQS# is only used when differential data strobe mode is enabled via the LOAD MODE
command.
Redundant data strobe: For x8 only. RDQS is enabled/disabled via the LOAD MODE com-
mand to the extended mode register (EMR). When RDQS is enabled, RDQS is output with
read data only and is ignored during write data. When RDQS is disabled, ball B3 becomes
data mask (see DM ball). RDQS# is only used when RDQS is enabled and differential data
strobe mode is enabled.
Power supply: 1.8V ±0.1V.
DQ power supply: 1.8V ±0.1V. Isolated on the device for improved noise immunity.
DLL power supply: 1.8V ±0.1V.
SSTL_18 reference voltage.
Ground.
DLL ground: Isolated on the device from V
DQ ground: Isolated on the device for improved noise immunity.
No connect: These balls should be left unconnected.
No function: Not used only on x4. These are data lines on the x8.
Not used: Not used only on x16. If EMR[E10] = 0, A8 and E8 are UDQS# and LDQS#. If
EMR[E10] = 1, then A8 and E8 are not used.
Not used: For x4: Not used. For x8: If EMR[E10] = 0, E2 and E8 are RDQS# and DQS#; if
EMR[E10] = 1, then E2 and E8 are not used.
Reserved for future use: Row address bits A14 (R3), A15 (R7) on the x16, and A15 (L7)
on the x4/x8.
18
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Ball Assignments and Descriptions
SS
and V
2Gb: x4, x8, x16 DDR2 SDRAM
SSQ
.
© 2006 Micron Technology, Inc. All rights reserved.