MT49H32M9BM-25 Micron Technology Inc, MT49H32M9BM-25 Datasheet - Page 43

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MT49H32M9BM-25

Manufacturer Part Number
MT49H32M9BM-25
Description
Manufacturer
Micron Technology Inc
Type
RLDRAMr
Datasheet

Specifications of MT49H32M9BM-25

Organization
32Mx9
Density
288Mb
Address Bus
22b
Maximum Clock Rate
400MHz
Operating Supply Voltage (typ)
1.8V
Package Type
uBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
779mA
Pin Count
144
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT49H32M9BM-25
Manufacturer:
MICRON/美光
Quantity:
20 000
Part Number:
MT49H32M9BM-25:B
Manufacturer:
MICRON/美光
Quantity:
20 000
Company:
Part Number:
MT49H32M9BM-25:B
Quantity:
260
Figure 18:
PDF: 09005aef80a41b59/Source: 09005aef809f284b
288Mb_RLDRAM_II_CIO.Core.fm - Rev B 5/08 EN
Power-Up/Initialization Flow Chart
Notes:
1. The sequence of the eight AUTO REFRESH commands (with respect to the 1,024 NOP com-
Step
10
11
12
13
14
15
16
17
18
19
1
2
3
4
5
6
7
8
9
mands) does not matter. As is required for any operation,
AUTO REFRESH command and a subsequent VALID command to the same bank.
Desired load mode register with A10–A17 LOW
Issue MRS command—A10–A17 must be LOW
Issue MRS command—A10–A17 must be LOW
288Mb: x9, x18, x36 2.5V V
Apply stable CK/CK# and DK/DK#
Issue AUTO REFRESH to bank 0
Issue AUTO REFRESH to bank 1
Issue AUTO REFRESH to bank 2
Issue AUTO REFRESH to bank 3
Issue AUTO REFRESH to bank 4
Issue AUTO REFRESH to bank 5
Issue AUTO REFRESH to bank 6
Issue AUTO REFRESH to bank 7
Wait 1,024 NOP commands 1
Assert NOP for
V
Apply V
Wait at least 200µs
DD,
Valid command
V
and V
DD
Q ramp
REF
EXT
and V
ramp
t
MRSC
TT
42
consecutive clock
MRS commands
can be applied
simultaneously
Voltage rails
must be on
cycles
Micron Technology, Inc., reserves the right to change products or specifications without notice.
EXT
, 1.8V V
DD
t
RC must be met between an
, HSTL, CIO, RLDRAM II
©2003 Micron Technology, Inc. All rights reserved.
Operations

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