NAND08GW3B2CN6E NUMONYX, NAND08GW3B2CN6E Datasheet - Page 17

• Manufacturer Part Number: NAND08GW3B2CN6E
• Description: 8GBIT SLC NAND FLASH TSOP
• Manufacturer: NUMONYX

Specifications of NAND08GW3B2CN6E

• Cell Type: NAND
• Density: 8Gb
• Access Time (max): 25us
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 30b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 1G
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Compliant

NAND04G-B2D, NAND08G-BxC
3.7
3.8
3.9
3.10
3.11
Write enable (W)
The Write Enable input, W, controls writing to the command interface, input address and
data latches. Both addresses and data are latched on the rising edge of Write Enable.
During power-up and power-down a recovery time of 10 µs (min) is required before the
command interface is ready to accept a command. It is recommended to keep Write Enable
High during the recovery time.
Write protect (WP)
The Write Protect pin is an input that gives a hardware protection against unwanted program
or erase operations. When Write Protect is Low, V
program or erase operations.
It is recommended to keep the Write Protect pin Low, V
Ready/Busy (RB)
The Ready/Busy output, RB, is an open-drain output that identifies if the P/E/R controller is
currently active.
When Ready/Busy is Low, V
operation completes, Ready/Busy goes High, V
The use of an open-drain output allows the ready/busy pins from several memories to be
connected to a single pull-up resistor. A Low then indicates that one or more of the
memories is busy.
During power-up and power-down a minimum recovery time of 10 µs is required before the
command interface is ready to accept a command. During this period the RB signal is Low,
V
Refer to
calculate the value of the pull-up resistor.
V
V
power supply for all operations (read, program and erase).
An internal voltage detector disables all functions whenever V
Table
Each device in a system should have V
widths should be sufficient to carry the required program and erase currents.
V
Ground, V
ground.
OL
DD
DD
SS
.
provides the power supply to the internal core of the memory device. It is the main
29) to protect the device from any involuntary program/erase during power-transitions.
ground
supply voltage
Section 12.1: Ready/busy signal electrical characteristics
SS,
is the reference for the power supply. It must be connected to the system
OL
, a read, program or erase operation is in progress. When the
DD
decoupled with a 0.1 µF capacitor. The PCB track
OH
IL
.
, the device does not accept any
IL
, during power-up and power-down.
DD
is below V
for details on how to
Signals description
LKO
(see
17/72