NAND08GW3B2CN6E NUMONYX, NAND08GW3B2CN6E Datasheet - Page 32

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NAND08GW3B2CN6E

Manufacturer Part Number
NAND08GW3B2CN6E
Description
8GBIT SLC NAND FLASH TSOP
Manufacturer
NUMONYX
Datasheet

Specifications of NAND08GW3B2CN6E

Cell Type
NAND
Density
8Gb
Access Time (max)
25us
Interface Type
Parallel
Boot Type
Not Required
Address Bus
30b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
1G
Supply Current
30mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Compliant

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Device operations
Figure 17. Multiplane copy back program
1. This address scheme refers to x8 devices. Please, remember to use the appropriate scheme for x16 devices.
2. Any command between 11h and 81h is prohibited except 70h and FFh.
6.7
32/72
RB
RB
I/O
I/O
Source address on 1st plane
Source address on 1st plane
Read
Read
code
code
00h
00h
Row Add. 1, 2, 3
Row Add. 1, 2, 3
Block erase
Erase operations are done one block at a time. An erase operation sets all of the bits in the
addressed block to ‘1’. All previous data in the block is lost.
Col. Add. 1, 2
Col. Add. 1, 2
(1)
Main area
Add. 5
Add. 5
cycles
cycles
Source page
Target page
First plane
(Read Busy time)
(Read Busy time)
tBLBH1
tBLBH1
35h
35h
(3)
Busy
Busy
Spare area
Read
Source address on 2nd plane
Read
Source address on 2nd plane
code
code
00h
00h
Row Add. 1, 2, 3
Row Add. 1, 2, 3
Col. Add. 1, 2
Col. Add. 1, 2
Add. 5
Add. 5
cycles
cycles
(Read Busy time)
(Read Busy time)
tBLBH1
tBLBH1
35h
35h
(2)
Main area
Second plane
Source page
Target page
Busy
Busy
a) Traditional sequence.
b) ONFI 1.0 sequence.
Copy back
Copy back
code
code
85h
85h
A18 = set to 'Low'
A19-A28 = set to 'Low'
A12-A17 = set to 'Low'
A12-A17 = set to 'Low'
A0-A11 = set to 'Low'
A18 = set to 'Low'
A19-A28 = set to 'Low'
A0-A11 = set to 'Low'
(3)
Destination address
Destination address
Row Add. 1, 2, 3
Row Add. 1, 2, 3
Spare area
Col. Add. 1, 2
Col. Add. 1, 2
Add. 5
Add. 5
cycles
cycles
(1): Read for copy back on first plane
(2): Read for copy back on second plane
(3): Two-plane copy back program
tIPBSY
tIPBSY
11h
11h
Busy
Busy
2
2
Copy back
Copy back
NAND04G-B2D, NAND08G-BxC
code
code
81h
85h
A0-A11 = set to 'Low'
A12-A17 = Valid
A0-A11 = set to 'Low'
A12-A17 = Valid
A18 = set to 'High'
A19-A28 = Valid
A18 = set to 'High'
A19-A28 = Valid
Destination address
Destination address
Row Add. 1, 2, 3
Row Add. 1, 2, 3
Col. Add. 1, 2
Col. Add. 1, 2
Add. 5
Add. 5
cycles
cycles
(Program Busy time)
(Program Busy time)
tBLBH2
tBLBH2
Read Status Register
Read Status Register
10h
10h
Busy
Busy
ai13172f
70h
70h
SR0
SR0

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