ISP1581BD,551 NXP Semiconductors, ISP1581BD,551 Datasheet - Page 17

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ISP1581BD,551

Manufacturer Part Number
ISP1581BD,551
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1581BD,551

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Philips Semiconductors
8. Modes of operation
Table 3:
9. Register descriptions
Table 4:
9397 750 13462
Product data
Name
Initialization registers
Address
Mode
Interrupt Configuration
Interrupt Enable
DMA Configuration
DMA Hardware
Data flow registers
Endpoint Index
Control Function
Data Port
Buffer Length
Endpoint MaxPacketSize
Endpoint Type
Short Packet
BUS_CONF
0
1
Bus configuration modes
Register overview
PIO width
AD[7:0]
D[15:0]
A[7:0]
DMAWD = 0 DMAWD = 1
The ISP1581 has two bus configuration modes, selected via pin BUS_CONF/DA0 at
power-up:
Details of the bus configurations for each mode are given in
circuits for each mode are given in
Destination
device
device
device
device
DMA controller
DMA controller
endpoints
endpoint
endpoint
endpoint
endpoint
endpoint
endpoint
D[7:0]
D[7:0]
Split Bus mode (BUS_CONF = 0): 8-bit multiplexed address/data bus and
separate 8-bit/16-bit DMA bus
Generic Processor mode (BUS_CONF = 1); separate 8-bit address and 16-bit
data bus
DMA width
D[15:0]
D[15:0]
Rev. 06 — 23 December 2004
Address
(Hex)
00
0C
10
14
38
3C
2C
28
20
1C
04
08
24
Description
Split Bus mode: multiplexed address/data on pins AD[7:0];
separate 8/16-bit DMA bus on pins DATA[15:0]
Generic Processor mode: separate 8-bit address on pins
AD[7:0]; 16-bit data (PIO and DMA) on pins DATA[15:0]
Section
Description
USB device address + enable
power-down options, global interrupt
enable, SoftConnect
interrupt sources, trigger mode, output
polarity
interrupt source enabling
see sub-section
see sub-section
endpoint selection, data flow direction
endpoint buffer management
data access to endpoint FIFO
packet size counter
maximum packet size
selects endpoint type: control,
isochronous, bulk or interrupt
short packet received on OUT endpoint
15.
Hi-Speed USB peripheral controller
“DMA registers”
“DMA registers”
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Table
3. Typical interface
ISP1581
Size
(bytes)
1
1
1
4
2
1
1
1
2
2
2
2
2
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