ISP1581BD,551 NXP Semiconductors, ISP1581BD,551 Datasheet - Page 27

• Manufacturer Part Number: ISP1581BD,551
• Manufacturer: NXP Semiconductors

Specifications of ISP1581BD,551

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
Table 21:
Table 22:
9397 750 13462
Product data
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Buffer Length register: bit allocation
Endpoint MaxPacketSize register: bit allocation
R/W
15
15
7
7
-
-
9.3.5 Endpoint MaxPacketSize register (address: 04H)
This register determines the maximum packet size for all endpoints except Control 0.
The register contains 2 bytes and the bit allocation is given in
Each time the register is written, the Buffer Length registers of all endpoints are
re-initialized to the FFOSZ field value. The NTRANS bits control the number of
transactions allowed in a single micro-frame (for high-speed Isochronous and
interrupt endpoints only).
reserved
Table 23:
Bit
15 to 13
12 to 11
10 to 0
R/W
14
14
6
6
-
-
Endpoint MaxPacketSize register: bit description
Symbol
reserved
NTRANS[1:0]
FFOSZ[10:0]
R/W
13
13
5
5
-
-
Rev. 06 — 23 December 2004
Description
reserved
Number of Transactions (HS mode only):
0 — 1 packet per microframe
1 — 2 packets per microframe
2 — 3 packets per microframe
3 — reserved.
These bits are applicable for Isochronous/interrupt transactions
only.
FIFO Size: Sets the FIFO size in bytes for the indexed endpoint.
Applies to both HS and FS operation.
DATACOUNT[15:8]
DATACOUNT[7:0]
12
12
4
4
NTRANS[1:0]
FFOSZ[7:0]
R/W
R/W
R/W
R/W
00H
00H
00H
00H
00H
00H
00H
00H
11
11
3
3
Hi-Speed USB peripheral controller
10
10
2
2
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
FFOSZ[10:8]
Table
R/W
00H
00H
9
1
9
1
ISP1581
22.
8
0
8
0
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