ISP1161A1BD,118 STEricsson, ISP1161A1BD,118 Datasheet - Page 81

• Manufacturer Part Number: ISP1161A1BD,118
• Manufacturer: STEricsson

Specifications of ISP1161A1BD,118

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

ISP1161A1_4
Product data sheet
11.3.4 Endpoint initialization
11.3.5 Endpoint I/O mode access
11.3.6 Special actions on control endpoints
In response to the standard USB request, Set Interface, the firmware must program all
16 ECRs of the ISP1161A1’s DC in sequence (see
enabled or not. The hardware will then automatically allocate FIFO storage space.
If all endpoints have been configured successfully, the firmware must return an empty
packet to the control IN endpoint to acknowledge success to the host. If there are errors in
the endpoint configuration, the firmware must stall the control IN endpoint.
When reset by hardware or via the USB bus, the ISP1161A1’s DC disables all endpoints
and clears all ECRs, except for the control endpoint which is fixed and always enabled.
Endpoint initialization can be done at any time; however, it is valid only after enumeration.
When an endpoint event occurs (a packet is transmitted or received), the associated
endpoint interrupt bits (EPn) of the DcInterrupt register will be set by the SIE. The
firmware then responds to the interrupt and selects the endpoint for processing.
The endpoint interrupt bit will be cleared by reading the DcEndpointStatus register (ESR).
The ESR also contains information on the status of the endpoint buffer.
For an OUT (receive) endpoint, the packet length and packet data can be read from the
ISP1161A1’s DC using the Read Buffer command. When the whole packet has been
read, the firmware sends a Clear Buffer command to enable the reception of new packets.
For an IN (transmit) endpoint, the packet length and data to be sent can be written to the
ISP1161A1’s DC using the Write Buffer command. When the whole packet has been
written to the buffer, the firmware sends a Validate Buffer command to enable data
transmission to the host.
Control endpoints require special firmware actions. The arrival of a Setup packet flushes
the IN buffer and disables the Validate Buffer and Clear Buffer commands for the control
IN and OUT endpoints. The microcontroller needs to re-enable these commands by
sending an Acknowledge Setup command.
This ensures that the last Setup packet stays in the buffer and that no packets can be sent
back to the host until the microcontroller has explicitly acknowledged that it has seen the
Setup packet.
Rev. 04 — 29 January 2009
USB single-chip host and device controller
Table
66), whether the endpoints are
ISP1161A1
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