MC9S08QD2CSC Freescale, MC9S08QD2CSC Datasheet - Page 56

MC9S08QD2CSC

Manufacturer Part Number
MC9S08QD2CSC
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S08QD2CSC

Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
128Byte
# I/os (max)
4
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
4-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Package Type
SOIC N
Program Memory Type
Flash
Program Memory Size
2KB
Lead Free Status / RoHS Status
Compliant

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0
Chapter 5 Resets, Interrupts, and General System Control
5.6
The MC9S08QD4 series includes a system to protect against low voltage conditions in order to protect
memory contents and control MCU system states during supply voltage variations. The system is
comprised of a power-on reset (POR) circuit and an LVD circuit with a user selectable trip voltage, either
high (V
voltage is selected by LVDV in SPMSC2. The LVD is disabled upon entering any of the stop modes unless
LVDSE is set in SPMSC1. If LVDSE and LVDE are both set, then the MCU cannot enter stop1 or stop2,
and the current consumption in stop3 with the LVD enabled will be greater.
56
Priority
Vector
Higher
Lower
LVDH
Low-Voltage Detect (LVD) System
Number
through
Vector
) or low (V
31
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0xFFDC:FFDD
0xFFCE:FFCF
0xFFDA:FFDB
0xFFDE:FFDF
0xFFEC:FFED
0xFFEA:FFEB
0xFFEE:FFEF
0xFFFC:FFFD
0xFFC0:FFC1
0xFFD0:FFD1
0xFFD2:FFD3
0xFFD4:FFD5
0xFFD6:FFD7
0xFFD8:FFD9
0xFFFA:FFFB
0xFFFE:FFFF
0xFFE0:FFE1
0xFFE2:FFE3
0xFFE4:FFE5
0xFFE6:FFE7
0xFFE8:FFE9
0xFFF0:FFF1
0xFFF2:FFF3
0xFFF4:FFF5
0xFFF6:FFF7
0xFFF8:FFF9
(High:Low)
Address
LVDL
through
). The LVD circuit is enabled when LVDE in SPMSC1 is high and the trip
MC9S08QD4 Series MCU Data Sheet, Rev. 6
Vector Name
Vkeyboard1
Vtpm2ch0
Vtpm1ch1
Vtpm1ch0
Vtpm2ovf
Vtpm1ovf
Table 5-2. Vector Summary
Vadc1
Vreset
Vswi
Vlvd
Virq
Vrti
Module
System
System
System
control
control
control
ADC1
TPM2
TPM2
TPM1
TPM1
TPM1
KBI1
CPU
IRQ
Illegal address
(available for user program)
Illegal opcode
RESET pin
Instruction
Unused Vector Space
Source
IRRQF
COCO
CH0F
CH1F
CH0F
LVDF
RTIF
COP
POR
KBF
TOF
TOF
SWI
LVD
RSTPE
Enable
LVDRE
CH0IE
CH1IE
CH0IE
LVDIE
COPE
IRQIE
RTIE
AIEN
KBIE
TOIE
TOIE
Freescale Semiconductor
Real-time interrupt
Low voltage detect
Low-voltage detect
Software interrupt
TPM2 channel 0
TPM1 channel 1
TPM1 channel 0
Watchdog timer
power-on-reset
TPM2 overflow
TPM1 overflow
Illegal address
Keyboard pins
Illegal opcode
Description
External pin
IRQ pin
ADC1

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