MC9S08QG8CDTER Freescale, MC9S08QG8CDTER Datasheet - Page 23

• Manufacturer Part Number: MC9S08QG8CDTER
• Manufacturer: Freescale

Specifications of MC9S08QG8CDTER

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 512Byte
• # I/os (max): 12
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: TSSOP
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Lead Free Status / RoHS Status: Compliant

Table 1-2
System Clock Distribution
Figure 1-2
inputs as shown. The clock inputs to the modules indicate the clock(s) that are used to drive the module
function. All memory mapped registers associated with the modules are clocked with BUSCLK.
Freescale Semiconductor
EXTAL
* ICSERCLK requires XOSC module.
** ICSLCLK is the alternate BDC clock source for the MC9S08QG8/4.
XOSC
ICS
XTAL
provides the functional versions of the on-chip modules.
shows a simplified clock connection diagram. Some modules in the MCU have selectable clock
ICSFFE
ICSFFCLK
ICSOUT
ICSLCLK**
ICSERCLK*
÷
CONTROL
2
SYSTEM
LOGIC
1-kHz
÷
2
Analog Comparator
Analog-to-Digital Converter
Central Processing Unit
IIC Module
Internal Clock Source
Keyboard Interrupt
Modulo Timer
Serial Communications Interface
Serial Peripheral Interface
Timer Pulse-Width Modulator
Low-Power Oscillator
Debug Module
FIXED FREQ CLOCK (XCLK)
Figure 1-2. System Clock Distribution Diagram
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
BUSCLK
Table 1-2. Versions of On-Chip Modules
COP
RTI
Module
TPM
BDC
TCLK
MTIM
(ACMP)
(ADC)
(CPU)
(IIC)
(ICS)
(KBI)
(MTIM)
(SCI)
(SPI)
(TPM)
(XOSC)
(DBG)
CPU
IIC
ADC has min and max
frequency requirements.
See the ADC chapter
and
Appendix A, “Electrical
Characteristics.”
Version
ADC
2
1
2
1
1
2
1
3
3
2
1
2
SCI
Chapter 1 Device Overview
SPI
FLASH has frequency
requirements for
program
and erase operation.
See
“Electrical
Characteristics.”
FLASH
Appendix A,
21