MC9S08QG8CDTER Freescale, MC9S08QG8CDTER Datasheet - Page 47

• Manufacturer Part Number: MC9S08QG8CDTER
• Manufacturer: Freescale

Specifications of MC9S08QG8CDTER

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 512Byte
• # I/os (max): 12
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: TSSOP
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Lead Free Status / RoHS Status: Compliant

0xFFAE
0xFFAF
0xFFB0 –
0xFFB7
0xFFB8 –
0xFFBC
0xFFBD
0xFFBE
0xFFBF
Provided the key enable (KEYEN) bit is 1, the 8-byte comparison key can be used to temporarily
disengage memory security. This key mechanism can be accessed only through user code running in secure
memory. (A security key cannot be entered directly through background debug commands.) This security
key can be disabled completely by programming the KEYEN bit to 0. If the security key is disabled, the
only way to disengage security is by mass erasing the FLASH if needed (normally through the background
debug interface) and verifying that FLASH is blank. To avoid returning to secure mode after the next reset,
program the security bits (SEC01:SEC00) to the unsecured state (1:0).
4.4
The MC9S08QG8/4 includes static RAM. The locations in RAM below 0x0100 can be accessed using the
more efficient direct addressing mode, and any single bit in this area can be accessed with the bit
manipulation instructions (BCLR, BSET, BRCLR, and BRSET). Locating the most frequently accessed
program variables in this area of RAM is preferred.
The RAM retains data when the MCU is in low-power wait, stop2, or stop3 mode. At power-on or after
wakeup from stop1, the contents of RAM are uninitialized. RAM data is unaffected by any reset provided
that the supply voltage does not drop below the minimum value for RAM retention (V
For compatibility with M68HC05 MCUs, the HCS08 resets the stack pointer to 0x00FF. In the
MC9S08QG8/4, it is usually best to reinitialize the stack pointer to the top of the RAM so the direct page
RAM can be used for frequently accessed RAM variables and bit-addressable program variables. Include
the following 2-instruction sequence in your reset initialization routine (where RamLast is equated to the
highest address of the RAM in the Freescale Semiconductor-provided equate file).
When security is enabled, the RAM is considered a secure memory resource and is not accessible through
BDM or through code executing from non-secure memory. See
description of the security feature.
The RAM array is not automatically initialized out of reset.
Freescale Semiconductor
Address
Reserved for
Storage of FTRIM
Reserved for
Storage of ICSTRM
NVBACKKEY
Unused
NVPROT
Unused
NVOPT
RAM
Register Name
LDHX
TXS
#RamLast+1
KEYEN
Bit 7
—
—
—
0
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Table 4-4. Nonvolatile Register Summary
FNORED
—
—
—
6
0
;point one past RAM
;SP<-(H:X-1)
—
—
—
5
0
0
8-Byte Comparison Key
FPS
—
—
—
4
0
0
TRIM
Section 4.6,
Chapter 4 Memory Map and Register Definition
—
—
—
3
0
0
“Security,” for a detailed
—
—
—
2
0
0
RAM
SEC01
—
—
—
1
0
).
SEC00
FTRIM
FPDIS
Bit 0
—
—
—
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