MCIMX515CJM6C Freescale, MCIMX515CJM6C Datasheet - Page 121

• Manufacturer Part Number: MCIMX515CJM6C
• Manufacturer: Freescale

Specifications of MCIMX515CJM6C

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

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2
Freescale Semiconductor
There is a special timing requirement in the ATA host that requires the internal DIOW to go only high 3 clocks after the last
active edge on the DSTROBE signal. The equation given on this line tries to capture this constraint.
Make ton and toff big enough to avoid bus contention.
Parameter
tdzfs
ATA
tenv
tzah
tack
tcyc
tcvh
tmli
tdh
tds
trp
—
—
Parameter
Figure
Figure
Figure 79
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
from
tmli1
tdzfs
tenv
tdh1
tzah
tack
tds1
tcvh
toff
tx1
tc1
ton
trp
Figure 79. UDMA In Device Terminates Transfer Timing Diagram
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77,
78,
tack (min) = (time_ack
tenv (min) = (time_env
tenv (max) = (time_env
tds – (tskew3) – ti_ds > 0
tdh – (tskew3) – ti_dh > 0
(tcyc – tskew) > T
trp (min) = time_rp
(time_rp
tmli1 (min) = (time_mlix + 0.4)
tzah (min) = (time_zah + 0.4)
tdzfs = (time_dzfs
tcvh = (time_cvh
ton = time_on
toff = time_off
Table 95. UDMA In Burst Timing Parameters
×
T) – (tco + tsu + 3T + 2
×
×
T – tskew1
T – tskew1
×
×
T) – (tskew1 + tskew2)
×
T) – (tskew1 + tskew2)
T – (tskew1 + tskew2 + tskew6)
×
×
×
T) – (tskew1 + tskew2)
T) – (tskew1 + tskew2)
T) + (tskew1 + tskew2)
Description
×
×
T
T
×
tbuf + 2
×
tcable2) > trfs (drive)
Electrical Characteristics
should be low enough
Controlling Variable
tskew3, ti_ds, ti_dh
T big enough
time_dzfs
time_mlix
time_ack
time_env
time_zah
time_cvh
time_rp
time_rp
—
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