PNX1700EH/G,557 Trident Microsystems, Inc., PNX1700EH/G,557 Datasheet - Page 222

• Manufacturer Part Number: PNX1700EH/G,557
• Manufacturer: Trident Microsystems, Inc.

Specifications of PNX1700EH/G,557

• Lead Free Status / RoHS Status: Supplier Unconfirmed

1. Introduction
PNX17xx Series includes a PCI interface for easy integration into personal computer
applications (where the PCI-bus is the standard for high-speed peripherals). In
embedded applications the PCI bus can interface to peripheral devices that
implement functions not provided by the on-chip modules or to connected several
CPUs together.
The main function of the PCI interface is to connect the PNX17xx Series on-chip MTL
bus (and therefore its main memory) and its internal registers to the rest of the world.
A bus cycle on PCI that targets an address mapped into PNX17xx Series memory
space will cause the PCI interface to create a MTL bus cycle targeted at DRAM. From
PNX17xx Series, only the TM5250 CPU can cause the PCI interface to create PCI
bus cycles; the other on-chip modules cannot see external hardware through the PCI
interface. From PCI, DRAM and most of the registers in MMIO space can be
accessed by external PCI initiators.
The PCI interface implements DMA (also called block or burst transfers) and non-
DMA transfers. DMA transfers are interruptible on 64-byte boundaries. The PCI
interface can service outbound (PNX17xx Series
PNX17xx Series) data flows simultaneously.
The following classes of operations invoked by PNX17xx Series cause the PCI
interface to act as a PCI initiator:
The PNX17xx Series PCI interface responds as a target to external initiators for a
limited set of PCI transaction types:
PNX17xx Series ignores PCI transactions other than the above.
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Chapter 7: PCI-XIO Module
PNX17xx Series Data Book – Volume 1 of 1
Rev. 1 — 17 March 2006
Transparent, single-word (or smaller) transactions caused by TM5250 loads and
stores to one of the two available the PCI address aperture, PCI1 and PCI2.
Explicitly programmed single-word I/O or configuration read or write transactions
Explicitly programmed multi-word DMA transactions.
Configuration read/write.
Memory read/write, read line, and read multiple to the PNX17xx Series DRAM or
MMIO apertures.
PCI) and inbound (PCI
Preliminary data sheet