SAA7144 NXP Semiconductors, SAA7144 Datasheet - Page 9

• Manufacturer Part Number: SAA7144
• Manufacturer: NXP Semiconductors

Specifications of SAA7144

• Package Type: LQFP
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
9397 750 14454
Product data sheet
8.2.1 Clamping
8.2.2 Gain control
8.1 Analog input processing
8.2 Analog control circuits
The analog input processing part consists of a source switch to select one out of two
video inputs, clamp circuit, analog amplifier, anti-alias filter and video 9-bit CMOS ADC;
see
The anti-alias filters are adapted to the line-locked clock frequency via a filter control
circuit. The characteristic is shown in
and clamping control are frozen.
The clamp control circuit controls the correct clamping of the analog input signals. The
coupling capacitor is also used to store and filter the clamping voltage. An internal digital
clamp comparator generates the information with respect to clamp-up or clamp-down.
The clamping levels for the two ADC channels are fixed for luminance (120) and
chrominance (256). Clamping time in normal use is set with the HCL pulse on the back
porch of the video signal.
The gain control circuit receives (via the I
amplifier or controls this amplifier automatically via a built-in Automatic Gain Control
(AGC) as part of the Analog Input Control (AICO).
The AGC (automatic gain control for luminance) is used to amplify a CVBS signal to the
required signal amplitude, matched to the ADC input voltage range. The AGC active time
is the sync bottom of the video signal.
Signal (white) peak control limits the gain at signal overshoots. The flow charts
(see
voltage variation within the specified range is automatically eliminated by clamp and
automatic gain control.
Fig 3. Anti-alias filter.
Figure
Figure 7
(dB)
V
12
18
24
30
36
42
6
0
6
6.
0
and
Figure
2
Rev. 01 — 21 April 2005
8) show more details of the AGC. The influence of supply
4
Figure
6
2
C-bus) the static gain levels for the analog
3. During the vertical blanking period, gain
8
Quadruple video input processor
10
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SAA7144HL
12
f (MHz)
mgd138
14
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