SSTUB32866BHLF IDT, Integrated Device Technology Inc, SSTUB32866BHLF Datasheet - Page 27

• Manufacturer Part Number: SSTUB32866BHLF
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of SSTUB32866BHLF

• Logic Family: SSTU
• Logical Function: Registered Buffer
• Number Of Elements: 1
• Number Of Bits: 25
• Number Of Inputs: 25
• Number Of Outputs: 25
• High Level Output Current: -8mA
• Low Level Output Current: 8mA
• Propagation Delay Time: 3ns
• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Clock-edge Trigger Type: Posit/Negat-Edge
• Polarity: Non-Inverting
• Technology: CMOS
• Frequency (max): 410(Min)MHz
• Mounting: Surface Mount
• Pin Count: 96
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

Ordering Information
1165A—3/21/07
ALL DIMENSIONS IN MILLIMETERS
Note: Ball grid total indicates maximum ball count for package. Lesser quantity may be used.
10-0055C
13.50 Bsc
11.50 Bsc
Example:
ICS XXXX y z (LF) T
D
ICSSSTUB32866Bz(LF)T
5.50 Bsc
5.00 Bsc
D
E
A1
TOP VIEW
1.20/1.40
1.00/1.20
Min/Max
E
T
SEATING
PLANE
0.80 Bsc
0.65 Bsc
e
Designation for tape and reel packaging
Lead Free, RoHS Compliant (Optional)
Package Type
Revision Designator (will not correlate with datasheet revision)
Device Type
Prefix
h TYP
H = LFBGA (standard size: 5.5 x 13.50)
HM = TFBGA (reduced size: 5.0 x 11.50)
ICS = Standard Device
C
----- BALL GRID -----
HORIZ
T
6
6
d TYP
0.12 C
VERT
16
16
27
b REF
c REF
D1
Max.
TOTAL
96
96
Advance Information
* Source Ref.: JEDEC Publication 95,
0.40/0.50
0.35/0.45
Min/Max
4
E1
d
3
Numeric Designations
for Horizontal Grid
ICSSSTUB32866B
2
1
0.25/0.41
0.25/0.35
Min/Max
A
B
C
D
h
-e-
-e-
TYP
Alpha Designations
for Vertical Grid
(Letters I, O, Q, and
S not used)
TYP
REF. DIMENSIONS
0.875
0.75
b
MO-205
0.875
0.75
c