IP4051CX11/LF,135 NXP Semiconductors, IP4051CX11/LF,135 Datasheet - Page 6

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IP4051CX11/LF,135

Manufacturer Part Number
IP4051CX11/LF,135
Description
IC EMI FILTER MMC ESD PROT 11CSP
Manufacturer
NXP Semiconductors
Series
-r
Datasheets

Specifications of IP4051CX11/LF,135

Capacitance
25pF
Package / Case
11-CSP
Resistance (ohms)
47, 13K, 56K
Resistance In Ohms
47, 13K, 56K
Channels
4 Channels
Termination Style
SMD/SMT
Tolerance
-
Power (watts)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Tolerance
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
/T3 934057926135 IP4051CX11/LF
NXP Semiconductors
AN10911_1
Application note
2.2 SD-memory card bus timing conditions
All further considerations are based on a chosen 20 % and 70 % threshold respectively
(related to the SD-memory card supply voltage V
otherwise indicated. These relative voltage levels also simplify an alignment with the MMC
specification.
The SD-memory card interface has different timing requirements for its default mode and
the high-speed mode up to 50 MHz clock frequency.
Special attention should be paid to the clock signal rise time and fall time requirements
(3 ns maximum).
As all NXP devices support the high-speed mode that supersedes the default mode
requirements, only these requirements are taken into account here.
However, the devices explained in this document support both, the default mode and the
high-speed mode.
Table 3.
[1]
[2]
Symbol
f
t
t
PP
r
f
Fig 2.
Other timing parameters such as hold time, set-up time, high-level and low-level are dependent on the host
/ SD-memory card interface and not significantly influenced by the NXP interface conditioning devices.
Values refer to V
V
V
V
V
V
V
OH
OH
IH
IL
OL
OL
= 0.25 * V
= 0.625 * V
Threshold voltage levels, output levels versus input levels
= 0.2 * V
= 0.125 * V
= 0.75 * V
= 0.7 * V
SD-memory card timing conditions (high-speed mode)
Parameter
operating clock
frequency
rise time
fall time
GND
V
SD
All information provided in this document is subject to legal disclaimers.
SD
SD
SD
SD
SD
OH
SD
requirement
, V
Driver side
minimum
OL
Rev. 01 — 29 April 2010
specified for the EMI filter output.
SD(HC)-memory card and MMC interface conditioning
Condition
20 % to 70 % of V
70 % to 20 % of V
Receiver side
requirement
minimum
SD
) as specified in
DD
DD
Receiver side
requirement
minimum
[2]
[2]
Min
0
-
-
[1]
Table
AN10911
© NXP B.V. 2010. All rights reserved.
Host output
threshold level
NXP filter output
threshold level
SD Card input
threshold level
Max
50
3
3
2, unless
Unit
MHz
ns
ns
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