ICS94201DFLFT IDT, Integrated Device Technology Inc, ICS94201DFLFT Datasheet - Page 11

• Manufacturer Part Number: ICS94201DFLFT
• Description: IC FREQ GENERATOR PROGR 56-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Frequency Generatorr

Specifications of ICS94201DFLFT

• Input: Crystal
• Output: Clock
• Frequency - Max: 500MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-SSOP
• Frequency-max: 500MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 94201DFLFT

Core Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . 4.6 V
I/O Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 3.6V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to V
Ambient Operating Temperature . . . . . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Case Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress
specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections
of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product
reliability.
Group Timing Relationship Table
1
0428B - 11/28/05
Absolute Maximum Ratings
T
1
Electrical Characteristics - Input/Supply/Common Output Parameters
Guaranteed by design, not 100% tested in production.
Guaranteed by design, not 100% tested in production.
SDRAM to 3V66
CPU to SDRAM
Powerdown Current
A
Input High Voltage
PCI to IOAPIC
Input Low Voltage
Input High Current
Input Capacitance
Input Low Current
CPU to 3V66
Clk Stabilization
USB & DOT
Operating Supply
3V66 to PCI
Input Frequency
Transition time
= 0 - 70C; Supply Voltage V
PARAMETER
Pin Inductance
Settling time
Group
Current
Delay
1
1.5-3.5ns
Asynch
SDRAM 100 MHz
Offset
2.5 ns
7.5 ns
0.0 ns
0.0 ns
1
1
CPU 66 MHz
1
1
Tolerance
SYMBOL
500 ps
500 ps
500 ps
500 ps
1.0 ns
t
t
N/A
I
I
I
PZH
PHZ
DD3.3OP
DD2.5OP
DD3.3PD
T
C
C
T
V
V
L
C
I
I
I
STAB
T
IL1
IL2
F
OUT
trans
INX
IH
pin
,t
,t
IN
IH
IL
i
s
PZL
PLZ
DD
1.5-3.5ns
Asynch
SDRAM 100 MHz
Offset
5.0 ns
5.0 ns
0.0 ns
0.0 ns
= 3.3 V +/-5%, V
CPU 100 MHz
V
V
V
C
CPU=66-133 MHz, SDRAM=100 MHz
CPU=133 MHz, SDRAM=133 MHz
C
C
V
Logic Inputs
Output pin capacitance
X1 & X2 pins
To 1st crossing of target frequency
From 1st crossing to 1% target frequency
From V
Output enable delay (all outputs)
Output disable delay (all outputs)
L
L
L
IN
IN
IN
DD
= max cap loads;
= max cap loads;
= 0 pF; Input address to VDD or GND
= V
= 0 V; Inputs with no pull-up resistors
= 0 V; Inputs with pull-up resistors
Tolerance
= 3.3 V
500 ps
500 ps
500 ps
500 ps
1.0 ns
N/A
DD
DD
= 3.3 V to 1% target frequency
1.5-3.5ns
Asynch
SDRAM 100 MHz
CONDITIONS
Offset
0.0 ns
0.0 ns
0.0 ns
0.0 ns
DDL
1
CPU 133 MHz
= 2.5 V +/-5% (unless otherwise stated)
Tolerance
500 ps
500 ps
500 ps
500 ps
1.0 ns
N/A
11
1.5-3.5ns
Asynch
3.75 ns
3.75 ns
SDRAM 133 MHz
Offset
0.0 ns
0.0 ns
CPU 133 MHz
DD
+0.5 V
Tolerance
500 ps
500 ps
500 ps
500 ps
1.0 ns
N/A
V
SS
MIN
-200
-0.3
27
-5
-5
2
1
1
14.318
TYP
334
465
280
20
V
DD
ICS94201
MAX
350
500
600
0.8
+0.3
70
45
10
10
5
7
5
6
3
3
3
UNITS
MHz
mA
µA
µA
µA
nH
pF
pF
pF
ms
ms
ms
ns
ns
V
V