ICS94201DFLFT IDT, Integrated Device Technology Inc, ICS94201DFLFT Datasheet - Page 8

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ICS94201DFLFT

Manufacturer Part Number
ICS94201DFLFT
Description
IC FREQ GENERATOR PROGR 56-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Frequency Generatorr
Datasheet

Specifications of ICS94201DFLFT

Input
Crystal
Output
Clock
Frequency - Max
500MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-SSOP
Frequency-max
500MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
94201DFLFT
ICS94201
Byte 13: ICS Reserved Register
Note: DON'T write a '1' into this register, it will
Byte 15: VCO Frequency Control Register
Note: The decimal representation of these 9 bits (Byte 15 bit
[7:0] & Byte 14 bit [7] ) + 8 is equal to the VCO divider value.
For example if VCO divider value of 36 is desired, user need
to program 36 - 8 = 28, namely, 0, 00011100 into byte 15 bit
& byte 14 bit 7.
To program the VCO frequency for over-clocking.
0. Before trying to program our clock manually, consider using ICS provided software utilities for easy programming.
1. Select the frequency you want to over-clock from with the desired gear ratio (i.e. CPU:SDRAM:3V66:PCI ratio) by writing to
2. Write 0001, 1001 (19
3. Read back byte 16-24 and copy values in these registers.
4. Re-initialize the write sequence.
5. Write a '1' to byte 8 bit 7 indicating you want to use byte 14 and 15 to control the VCO frequency.
6. Write to byte 14 & 15 with the desired VCO & REF divider values.
7. Write to byte 16 to 24 with the values you copy from step 3. This maintains the output divider mux controls the same gear ratio.
8. The above procedure is only needed when changing the VCO for the 1st pass. If VCO frequency needs to be changed again,
0428B - 11/28/05
user only needs to write to byte 14 and 15 unless the system is to reboot.
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
byte 0, or using initial hardware power up frequency.
B
B
t i
t i
t i
t i
t i
t i
t i
t i
t i
t i
t i
t i
t i
t i
t i
t i
t i
t i
cause malfunction.
6
4
2
0
6
4
2
0
7
5
3
1
7
5
3
1
P
P
W
W
X
X
X
X
X
X
X
X
0
0
0
0
0
0
0
0
D
D
1
R (
R (
R (
0
R (
R (
R (
R (
V
V
V
V
V
V
V
V
W
=
=
C
C
C
C
C
C
C
C
0
s e
s e
s e
2
s e
s e
s e
s e
5
O
O
O
O
O
O
O
O
m
0 8
i t
r e
r e
r e
r e
r e
r e
r e
H
s
m
D
D
D
D
D
D
D
D
m
e v
e v
e v
e v
e v
e v
e v
) to byte 6 for readback of 25 bytes (byte 0-24).
r e
v i
v i
v i
v i
v i
v i
v i
v i
s
) d
) d
) d
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) d
) d
) d
d i
d i
d i
d i
d i
d i
d i
d i
a b
r e
r e
r e
r e
r e
r e
r e
r e
e s
D
D
i B
i B
i B
i B
i B
i B
i B
i B
e
e
e s
c s
c s
8 t
7 t
6 t
5 t
4 t
3 t
2 t
1 t
e l
i r
i r
t c
t p
t p
o i
o i
n
n
8
Byte 14: VCO Frequency Control Register
Note: The decimal representation of these 7 bits (Byte 14
[6:0]) + 2 is equal to the REF divider value .
VCO Programming Constrains
VCO Frequency ...................... 150MHz to 500MHz
VCO Divider Range ................ 8 to 519
REF Divider Range ................. 2 to 129
Phase Detector Stability .......... 0.3536 to 1.4142
Useful Formula
VCO Frequency = 14.31818 x VCO/REF divider value
Phase Detector Stabiliy = 14.038 x (VCO divider value)
i B
i B
i B
i B
i B
i B
i B
i B
B
7 t
6 t
5 t
4 t
3 t
2 t
0 t
t i
1 t
P
W
X
X
X
X
X
X
X
X
D
V
R
R
R
R
R
R
R
E
E
E
E
E
E
E
C
F
F
F
F
F
F
F
O
D
D
D
D
D
D
D
D
v i
v i
v i
v i
v i
v i
v i
v i
d i
d i
d i
d i
d i
d i
d i
d i
r e
r e
r e
r e
r e
r e
r e
r e
D
B
B
B
B
B
B
B
B
s e
6 t i
5 t i
4 t i
3 t i
2 t i
1 t i
0 t i
0 t i
r c
p i
i t
n o
-0.5

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