ICS307G-03LF IDT, Integrated Device Technology Inc, ICS307G-03LF Datasheet - Page 3

• Manufacturer Part Number: ICS307G-03LF
• Description: IC CLK SOURCE SRL PROGR 16-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Generatorr

Specifications of ICS307G-03LF

• Pll: Yes
• Input: Clock, Crystal
• Output: LVCMOS
• Number Of Circuits: 1
• Ratio - Input:output: 2:3
• Differential - Input:output: No/No
• Frequency - Max: 270MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Frequency-max: 270MHz
• Number Of Elements: 1
• Supply Current: 24mA
• Pll Input Freq (min): 100KHz
• Pll Input Freq (max): 300MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSSOP
• Output Frequency Range: 0.0002 to 270MHz
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Pin Count: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 307G-03LF; 800-1028; 800-1028-5; 800-1028

Table 1. Input Divider
Table 2. VCO Divider
IDT® SERIALLY PROGRAMMABLE CLOCK SOURCE
Divide Value
Divide Value
ICS307-03
SERIALLY PROGRAMMABLE CLOCK SOURCE
2054
2055
2054
2055
12
13
14
10
11
12
13
14
15
16
17
18
19
20
21
1
2
3
4
5
6
7
8
9
12
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
23
0
0
0
0
1
1
0
0
0
1
1
11
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
1
1
22
0
0
0
1
1
10
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
1
1
21
0
0
0
1
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
9
0
0
0
0
1
1
20
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
1
1
8
0
0
0
0
1
1
7
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
1
1
19
0
0
0
1
1
Bits
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
6
0
0
0
0
1
1
Bits
18
0
0
0
1
1
X
X
5
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
17
0
0
0
1
1
X
X
4
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
1
1
3
16
X
X
3
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
1
1
X
X
2
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
15
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
14
0
0
1
1
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
subtract 2 from the
desired value, convert to
binary, invert, and apply
to bits 5...2
Bits [1..0] = 10
subtract 8 from the
desired divide value,
convert to binary, and
apply to bits 11...2
Bits [1..0] = 11
13
0
1
0
0
1
SER PROG CLOCK SYNTHESIZER
Rule
subtract 8 from the desired
divide value, convert to
binary, and apply to bits
23...13
1 + Bit 0
1+ Bit 0
Rule
ICS307-03
REV L 032911