M41ST85YMH6E STMicroelectronics, M41ST85YMH6E Datasheet - Page 17

IC RTC 5.0V 512BIT NVRAM 28SOIC

M41ST85YMH6E

Manufacturer Part Number
M41ST85YMH6E
Description
IC RTC 5.0V 512BIT NVRAM 28SOIC
Manufacturer
STMicroelectronics
Type
Clock/Calendar/Supervisorr
Datasheet

Specifications of M41ST85YMH6E

Memory Size
64B
Time Format
HH:MM:SS:hh (24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SOIC, 28-SOH (8.48mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-2806-5
M41ST85YMH6

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M41ST85YMH6E
Manufacturer:
IR
Quantity:
5 000
Setting Alarm Clock Registers
Address locations 0Ah-0Eh contain the alarm set-
tings. The alarm can be configured to go off at a
prescribed time on a specific month, date, hour,
minute, or second, or repeat every year, month,
day, hour, minute, or second. It can also be pro-
grammed to go off while the M41ST85Y/W is in the
battery back-up to serve as a system wake-up call.
Bits RPT5–RPT1 put the alarm in the repeat mode
of operation.
configurations. Codes not listed in the table default
to the once per second mode to quickly alert the
user of an incorrect alarm setting.
When the clock information matches the alarm
clock settings based on the match criteria defined
by RPT5–RPT1, the AF (Alarm Flag) is set. If AFE
(Alarm Flag Enable) is also set, the alarm condi-
tion activates the IRQ/FT/OUT pin as shown in
Figure 17., page
the Alarm Date Register and to RPT5–RPT1.
Note: If the address pointer is allowed to incre-
ment to the Flag Register address, an alarm con-
Figure 17. Alarm Interrupt Reset Waveform
Table 3. Alarm Repeat Modes
RPT5
1
1
1
1
1
0
ACTIVE FLAG
IRQ/FT/OUT
Table 3., page 17
17. To disable alarm, write '0' to
RPT4
0Eh
1
1
1
1
0
0
shows the possible
RPT3
1
1
1
0
0
0
0Fh
RPT2
dition will not cause the Interrupt/Flag to occur until
the address pointer is moved to a different ad-
dress. It should also be noted that if the last ad-
dress written is the “Alarm Seconds,” the address
pointer will increment to the Flag address, causing
this situation to occur.
The IRQ/FT/OUT output is cleared by a READ to
the Flags Register. A subsequent READ of the
Flags Register is necessary to see that the value
of the Alarm Flag has been reset to '0.'
The IRQ/FT/OUT pin can also be activated in the
battery back-up mode. The IRQ/FT/OUT will go
low if an alarm occurs and both ABE (Alarm in Bat-
tery Back-up Mode Enable) and AFE are set. The
ABE and AFE Bits are reset during power-up,
therefore an alarm generated during power-up will
only set AF. The user can read the Flag Register
at system boot-up to determine if an alarm was
generated while the M41ST85Y/W was in the de-
select mode during power-up.
illustrates the back-up mode alarm timing.
1
1
0
0
0
0
RPT1
1
0
0
0
0
0
M41ST85Y, M41ST85W
HIGH-Z
10h
Once per Second
Figure 18., page 18
Once per Minute
Once per Month
Alarm Setting
Once per Hour
Once per Year
Once per Day
AI03664
17/34

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