SC1200UCL-266 AMD (ADVANCED MICRO DEVICES), SC1200UCL-266 Datasheet - Page 45

• Manufacturer Part Number: SC1200UCL-266
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of SC1200UCL-266

• Lead Free Status / Rohs Status: Not Compliant

Signal Definitions
3.3
The tables that follow list multiplexing options and their
configurations. Certain multiplexing options may be chosen
per signal; others are available only for a group of signals.
Where ever a GPIO pin is multiplexed with another func-
tion, there is an optional pull-up resistor on this pin; after
AMD Geode™ SC1200/SC1201 Processor Data Book
Ball No.
AD3
AE1
AC3
AC1
AC2
AB4
AB1
AA4
AA3
AA2
AD1
AC4
AD2
AD4
AA1
AF2
AF1
D11
W4
W3
U2
Y3
Y2
Y1
V3
V2
V1
Y4
P2
Multiplexing Configuration
IDE_ADDR0
IDE_ADDR1
IDE_ADDR2
IDE_DATA0
IDE_DATA1
IDE_DATA2
IDE_DATA3
IDE_DATA4
IDE_DATA5
IDE_DATA6
IDE_DATA7
IDE_DATA8
IDE_DATA9
IDE_DATA10
IDE_DATA11
IDE_DATA12
IDE_DATA13
IDE_DATA14
IDE_DATA15
IDE_IOR0#
IDE_IORDY0
IDE_DREQ0
IDE_IOW0#
IDE_CS0#
IDE_CS1#
IDE_DACK0#
IDE_RST#
IRQ14
TRDE#
Signal
Sub-ISA
Table 3-5. Two-Signal/Group Multiplexing
Default
PMR[24] = 0
PMR[12] = 0
IDE
Configuration
system reset, the pull-up is present. This pull-up resistor
can be disabled by writing Core Logic registers. The config-
uration is without regard to the selected ball function. The
above applies to all pins multiplexed with GPIO, except
GPIO12, GPIO13, and GPIO16.
TFTD3
TFTD2
TFTD4
TFTD6
TFTD16
TFTD14
TFTD12
FP_VDD_ON
CLK27M
IRQ9
INTD#
GPIO40
DDC_SDA
DDC_SCL
GPIO41
TFTD13
TFTD15
TFTD17
TFTD7
TFTD10
TFTD11
TFTD8
TFTD9
TFTD5
TFTDE
TFTD0
TFTDCK
TFTD1
GPIO0
Signal
TFT, CRT, PCI, GPIO, System
Alternate
32579B
GPIO
PMR[24] = 1
PMR[12] = 1
Configuration
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