W66910CD Winbond Electronics, W66910CD Datasheet - Page 33

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W66910CD

Manufacturer Part Number
W66910CD
Description
Manufacturer
Winbond Electronics
Datasheet

Specifications of W66910CD

Lead Free Status / Rohs Status
Not Compliant
7.5 PCM Port
There are two PCM ports in W66910. Data is transmitted/ received when PFCK1/PFCK2 is HIGH. The frame synchronization
clocks (PFCK1-2) are 8 kHz and the bit synchronization clock (PBCK) is 1.536 MHz.
7.6 D Channel HDLC Controller
There are two HDLC protocols that are used for ISDN layer 2 functions : LAPD and LAPB. Their frame formats are shown
below.
LAPB modulo 8 :
LAPB modulo 128 :
Control field bits
I frame
S frame
U frame
LAPD : modulo 128 only
Control field bits
I frame
S frame
U frame
Control field bits
I frame
S frame
U frame
(1 octet)
(1 octet)
(1 octet)
flag
flag
flag
address
(1octet)
address
(1octet)
(2 octets)
address
M
M
X
7
7
0
(1 or 2 octets)
(1octet)
control
M
control
7
M
M
X
6
6
0
(2 octets)
control
N(R)
N(R)
M
M
M
X
6
5
5
0
(0 or N octets)
information
N(S)
N(S)
P/F
P/F
1st octet
1st octet
X
4
4
0
M
5
(0 or N octets)
information
M
M
S
S
3
3
P/F
P/F
4
P
(0 or N octets)
information
M
M
S
S
2
2
M
3
S
(2 octets)
0
1
0
1
1
1
-33 -
N(S)
FCS
M
2
S
0
0
1
1
0
0
1
1
(2 octets)
1
0
1
FCS
7
7
(1 octet)
flag
(2 octets)
0
0
1
1
FCS
6
6
W66910 PCI ISDN S/T-Controller
(1 octet)
flag
5
5
Publication Release Date:
N(R)
N(R)
N(R)
N(R)
2nd octet
2nd octet
(1 octet)
4
4
flag
3
3
2
2
1
1
Data Sheet
P/F
P/F
P/F
Revision 1.0
P
0
0
Feb,2001

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