W66910CD Winbond Electronics, W66910CD Datasheet - Page 4

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W66910CD

Manufacturer Part Number
W66910CD
Description
Manufacturer
Winbond Electronics
Datasheet

Specifications of W66910CD

Lead Free Status / Rohs Status
Not Compliant
8.1 C
8.2 B1 HDLC
8.1.1 D_ch receive FIFO
8.1.2 D_ch transmit FIFO
8.1.3 D_ch command register
8.1.4 D_ch Mode Register
8.1.5 Timer 1 Register
8.1.6 Interrupt Status Register ISTA Read_clear Address 05H........................................................................................... 47
8.1.7 Interrupt Mask Register IMASK Read/Write Address 06H....................................................................................... 48
8.1.8 D_ch Extended Interrupt Register D_EXIR Read_clear Address 07H ..................................................................... 48
8.1.9 D_ch Extended Interrupt Mask Register D_EXIM Read/Write Address 08H............................................................ 49
8.1.10 D_ch Transmit Status Register D_XSTA Read Address 09H ................................................................................... 49
8.1.11 D_ch Receive Status Register D_RSTA Read Address 0AH .................................................................................... 50
8.1.12 D_ch SAPI Address Mask
8.1.13 D_ch SAPI1 Register
8.1.14 D_ch SAPI2 Register
8.1.15 D_ch TEI Address Mask
8.1.16 D_ch TEI1 Register
8.1.17 D_ch TEI2 Register
8.1.18 D_ch Receive Frame Byte Count High D_RBCH Read Address 11H...................................................................... 52
8.1.19 D_ch Receive Frame Byte Count Low D_RBCL Read Address 12H........................................................................ 52
8.1.20 Timer 2
8.1.21 Layer 1_Ready Code
8.1.22 Control Register
8.1.23 Command/Indication Receive Register CIR Read Address 58H/16H....................................................................... 54
8.1.24 Command/Indication Transmit Register CIX Read/Write Address 17H................................................................... 54
8.1.25 S/Q Channel Receive Register SQR Read Address 18H ........................................................................................... 55
8.1.26 S/Q Channel Transmit Register SQX Read/Write Address 19H................................................................................ 55
8.1.27 Peripheral Control Register PCTL Read/Write Address 1AH .................................................................................. 56
8.1.28 Monitor Receive Channel 0 MO0R Read Address 1BH ........................................................................................... 57
8.1.29 Monitor Transmit Channel 0 MO0X Read/Write Address 1CH................................................................................ 57
8.1.30 Monitor Channel 0 Interrupt Register MO0I Read_clear Address 1DH................................................................... 57
8.1.31 Monitor Channel 0 Control Register MO0C Read/Write Address 1EH ................................................................... 58
8.1.32 GCI Mode Control/Status Register GCR Read/Write Address 1FH.......................................................................... 58
8.1.33 Peripheral Data Register 1 XDATA1 Read/Write Address 3DH .............................................................................. 59
8.1.34 Peripheral Data Register 2 XDATA2 Read/Write Address 3EH............................................................................... 60
8.1.35 Monitor Receive Channel 1 Register MO1R Read Address 40H ............................................................................. 60
8.1.36 Monitor Transmit Channel 1 Register MO1X Read/Write Address 41H.................................................................. 61
8.1.37 Monitor Channel 1 Interrupt Register MO1I Read_clear Address 42H.................................................................... 61
8.1.38 Monitor Channel 1 Control Register MO1C Read/Write Address 43H.................................................................... 61
8.1.39 GCI IC1 Receive Register IC1R Read Address 44H ................................................................................................ 62
8.1.40 GCI IC1 Transmit Register IC1X Read/Write Address 45H ..................................................................................... 62
8.1.41 GCI IC2 Receive Register IC2R Read Address 46H ................................................................................................ 62
8.1.42 GCI IC2 Transmit Register IC2X Read/Write Address 47H ..................................................................................... 62
8.1.43 GCI CI1 Indication Register CI1R Read Address 48H............................................................................................. 63
8.1.44 GCI CI1 Command Register CI1X Read/Write Address 49H ................................................................................... 63
8.1.45 GCI Extended Interrupt Register GCI_EXIR Read_clear Address 4AH ................................................................. 63
8.1.46 GCI Extended Interrupt Mask Register GCI_EXIM Read/Write Address 4BH ....................................................... 64
8.2.1 B1_ch receive FIFO
8.2.2 B1_ch transmit FIFO
8.2.3 B1_ch command register
8.2.4 B1_ch Mode Register
8.2.5 B1_ch Extended Interrupt Register B1_EXIR Read_clear Address 24H .................................................................. 68
HIP
C
ONTROL AND
CONTROLER
TIMR2 Write Address 13H....................................................................................................................... 52
D_
...................................................................................................................................................... 64
CH
TIMR1 Read/Write Address 04H ................................................................................................... 46
CTL Read/Write Address 15H .................................................................................................... 53
HDLC
D_RFIFO Read Address 00H................................................................................................... 44
B1_RFIFO Read Address 20H.................................................................................................. 65
D_XFIFO Write Address 01H ................................................................................................ 44
D_MODE Read/Write Address 03H ....................................................................................... 45
D_TEI1 Read/Write Address 0FH .......................................................................................... 51
D_TEI2 Read/Write Address 10H........................................................................................... 51
B1_XFIFO Write Address 21H ............................................................................................... 65
B1_MODE Read/Write Address 23H ..................................................................................... 67
D_SAP1 Read/Write Address 0CH ...................................................................................... 50
D_SAP2 Read/Write Address 0DH ...................................................................................... 51
L1_RC Read/Write Address 14H........................................................................................... 53
D_CMDR Write Address 02H ............................................................................................ 45
B1_CMDR Read/Write Address 22H ................................................................................. 66
D_TAM Read/Write Address 0EH.................................................................................. 51
CONTROLLER
D_SAM Read/Write Address 0BH............................................................................. 50
................................................................................................................. 42
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W66910 PCI ISDN S/T-Controller
Publication Release Date:
Data Sheet
Revision 1.0
Feb,2001

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