EVAL-ADV7311EB Analog Devices Inc, EVAL-ADV7311EB Datasheet - Page 65

no-image

EVAL-ADV7311EB

Manufacturer Part Number
EVAL-ADV7311EB
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-ADV7311EB

Lead Free Status / Rohs Status
Not Compliant
The following register settings are used to generate an SD NTSC
CVBS output on DAC A:
For PAL CVBS output on DAC A, the same settings are used
except that subaddress = 40h and register setting = 11h.
The following register settings are used to generate an SD NTSC
black bar pattern output on DAC A:
REV. A
Subaddress
00h
40h
42h
44h
4Ah
All other registers are set as normal/default.
Subaddress
00h
02h
40h
42h
44h
4Ah
All other registers are set as normal/default.
Register
Setting
80h
10h
40h
40h
08h
Register
Setting
80h
04h
10h
40h
40h
08h
–65–
For PAL black bar pattern output on DAC A, the same settings
are used except that subaddress = 40h and register setting = 11h.
The following register settings are used to generate a 525p hatch
pattern on DAC D:
For 625p hatch pattern on DAC D, the same register settings
are used except that subaddress = 10h and register setting = 50h.
For a 525p black bar pattern output on DAC D, the same settings
are used as above except that subaddress = 02h and register
setting = 24h.
For 625p black bar pattern output on DAC D, the same settings
are used as above except that subaddress = 02h and register
setting = 24h; and subaddress = 10h and register setting = 50h.
Subaddress
00h
01h
10h
11h
16h
17h
18h
All other registers are set as normal/default.
ADV7310/ADV7311
Register
Setting
10h
10h
40h
05h
A0h
80h
80h