EVAL-ADV7311EB Analog Devices Inc, EVAL-ADV7311EB Datasheet - Page 71

• Manufacturer Part Number: EVAL-ADV7311EB
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADV7311EB

• Lead Free Status / Rohs Status: Not Compliant

Mode 2—Master Option
(Timing Register 0 TR0 = X X X X X 1 0 1)
In this mode, the ADV7310/ADV7311 can generate horizontal
and vertical sync signals. A coincident low transition of both
HSYNC and VSYNC inputs indicates the start of an odd field.
A VSYNC low transition when HSYNC is high indicates the
start of an even field. The BLANK signal is optional. When the
BLANK input is disabled, the ADV7310/ADV7311 automati-
cally blank all normally blank lines as per CCIR-624. HSYNC
is output on S_HSYNC , BLANK on S_BLANK, and VSYNC
on S_VSYNC.
REV. A
BLANK
HSYNC
VSYNC
PIXEL
DATA
BLANK
HSYNC
VSYNC
PIXEL
DATA
Figure 87. SD Timing Mode 2 Even to Odd Field Transition Master/Slave
Figure 88. SD Timing Mode 2 Odd to Even Field Transition Master/Slave
NTSC = 16
PAL = 12
NTSC = 16
PAL = 12
CLOCK/2
CLOCK/2
CLOCK/2
CLOCK/2
NTSC = 122
PAL = 132
CLOCK/2
CLOCK/2
–71–
NTSC = 122
PAL = 132
NTSC = 858
PAL = 864
Cb
CLOCK/2
CLOCK/2
CLOCK/2
CLOCK/2
Y
Cr
Y
Cb
Cb
ADV7310/ADV7311
Y
Cr
Y