EVAL-ADV7311EB Analog Devices Inc, EVAL-ADV7311EB Datasheet - Page 70

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EVAL-ADV7311EB

Manufacturer Part Number
EVAL-ADV7311EB
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-ADV7311EB

Lead Free Status / Rohs Status
Not Compliant
ADV7310/ADV7311
Mode 2— Slave Option
(Timing Register 0 TR0 = X X X X X 1 0 0)
In this mode, the ADV7310/ADV7311 accepts horizontal and
vertical sync signals. A coincident low transition of both HSYNC
and VSYNC inputs indicates the start of an odd field. A VSYNC
low transition when HSYNC is high indicates the start of an even
field. The BLANK signal is optional. When the BLANK input is
disabled, the ADV7310/ADV7311 automatically blank all normally
blank lines as per CCIR-624. HSYNC is input S_HSYNC,
BLANK on S_BLANK, and VSYNC on S_VSYNC.
HSYNC
BLANK
VSYNC
HSYNC
BLANK
VSYNC
HSYNC
BLANK
VSYNC
HSYNC
BLANK
VSYNC
522
DISPLAY
260
DISPLAY
622
523
309
DISPLAY
DISPLAY
261
524
623
310
262
525
624
311
263
EVEN FIELD
ODD FIELD
1
625
312
264
ODD FIELD
EVEN FIELD
2
265
313
1
Figure 85. SD Slave Mode 2 (NTSC)
Figure 86. SD Slave Mode 2 (PAL)
3
266
314
2
4
267
315
3
ODD FIELD
5
VERTICAL BLANK
VERTICAL BLANK
VERTICAL BLANK
EVEN FIELD
268
–70–
316
VERTICAL BLANK
4
6
269
EVEN FIELD
317
ODD FIELD
5
7
270
318
6
8
271
319
7
9
272
320
10
273
21
11
274
334
22
20
DISPLAY
23
335
283
21
DISPLAY
336
284
DISPLAY
DISPLAY
22
285
REV. A