LAN9118MT Standard Microsystems (SMSC), LAN9118MT Datasheet - Page 110
LAN9118MT
Manufacturer Part Number
LAN9118MT
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9118MT.pdf
(170 pages)
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Revision 1.0 (03-17-05)
6.3.19
BITS
31-0
DESCRIPTION
RX Dropped Frame Counter (RX_DFC). This counter is incremented every
time a receive frame is dropped. RX_DFC is cleared on any read of this
register.
An interrupt can be issued when this counter passes through its halfway
point (7FFFFFFFh to 80000000h).
RX_DROP– Receiver Dropped Frames Counter
This register indicates the number of receive frames that have been dropped.
Offset:
A0h
DATASHEET
110
High-Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Size:
32 bits
TYPE
RC
SMSC LAN9118
00000000h
DEFAULT
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