LAN9118MT Standard Microsystems (SMSC), LAN9118MT Datasheet - Page 114

• Manufacturer Part Number: LAN9118MT
• Manufacturer: Standard Microsystems (SMSC)

Revision 1.0 (03-17-05)
BITS
0
DESCRIPTION
Flow Control on Any Frame (FCANY). When this bit is set, the LAN9118
will assert back pressure, or transmit a pause frame when the AFC level is
reached and any frame is received. Setting this bit enables full-duplex flow
control when the LAN9118 is operating in full-duplex mode.
When this mode is enabled during half-duplex operation, the Flow Controller
does not decode the MAC address and will send a pause frame upon
receipt of a valid preamble (i.e., immediately at the beginning of the next
frame after the RX data FIFO level is reached).
When this mode is enabled during full-duplex operation, the Flow Controller
will immediately instruct the MAC to send a pause frame when the RX data
FIFO level is reached. The MAC will queue the pause frame transmission
for the next available window.
Setting this bit overrides bits [3:1] of this register.
Table 6.5 Backpressure Duration bit mapping
[19:16]
Ah
Bh
Ch
Dh
Eh
0h
1h
2h
3h
4h
5h
6h
7h
8h
9h
Fh
100Mbs Mode
DATASHEET
100uS
150uS
200uS
250uS
300uS
350uS
400uS
450uS
500uS
550uS
600uS
10uS
15uS
25uS
50uS
Backpressure Duration
5uS
114
High-Performance Single-Chip 10/100 Non-PCI Ethernet Controller
10Mbs Mode
102.2uS
152.2uS
202.2uS
252.2uS
302.2uS
352.2uS
402.2uS
452.2uS
502.2uS
552.2uS
602.2uS
12.2uS
17.2uS
27.2uS
52.2uS
7.2uS
TYPE
R/W
SMSC LAN9118
DEFAULT
Datasheet
0