DSPB56374AE Freescale Semiconductor, DSPB56374AE Datasheet - Page 19

• Manufacturer Part Number: DSPB56374AE
• Description: IC DSP 24BIT 150MHZ 52-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56374AE

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 150MHz
• Non-volatile Memory: ROM (84 kB)
• On-chip Ram: 54kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.25V
• Operating Temperature: -40°C ~ 110°C
• Mounting Type: Surface Mount
• Package / Case: 52-LQFP
• Product: DSPs
• Data Bus Width: 24 bit
• Processor Series: DSP563xx
• Core: 56000
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 150 MIPS
• Maximum Clock Frequency: 150 MHz
• Program Memory Type: Flash
• Program Memory Size: 24 KB
• Data Ram Size: 54 KB
• Operating Supply Voltage: 1.25 V or 3.3 V
• Maximum Operating Temperature: + 110 C
• Mounting Style: SMD/SMT
• Interface Type: SIA, SHI
• Minimum Operating Temperature: - 40 C
• Leaded Process Compatible: Yes
• Rohs Compliant: Yes
• Peak Reflow Compatible (260 C): Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
Signal Name
SCKR_1
SCKT_1
PE0
PE3
Input, output, or
Input, output, or
Table 11. Enhanced Serial Audio Interface_1 Signals (continued)
Input or output
Input or output
disconnected
disconnected
Signal Type
disconnected
disconnected
State during
DSP56374 Data Sheet, Rev. 4.2
Reset
GPIO
GPIO
Receiver Serial Clock_1—SCKR_1 provides the receiver
serial bit clock for the ESAI_1. The SCKR_1 operates as a
clock input or output used by all the enabled receivers in the
asynchronous mode (SYN=0), or as serial flag 0 pin in the
synchronous mode (SYN=1).
When this pin is configured as serial flag pin, its direction is
determined by the RCKD bit in the RCCR_1 register. When
configured as the output flag OF0, this pin will reflect the
value of the OF0 bit in the SAICR_1 register, and the data
in the OF0 bit will show up at the pin synchronized to the
frame sync in normal mode or the slot in network mode.
When configured as the input flag IF0, the data value at the
pin will be stored in the IF0 bit in the SAISR_1 register,
synchronized by the frame sync in normal mode or the slot
in network mode.
Port E0—When the ESAI_1 is configured as GPIO, this
signal is individually programmable as input, output, or
internally disconnected.
The default state after reset is GPIO disconnected.
Internal Pull down resistor.
This input is 5 V tolerant
Transmitter Serial Clock_1—This signal provides the serial
bit rate clock for the ESAI_1. SCKT_1 is a clock input or
output used by all enabled transmitters and receivers in
synchronous mode, or by all enabled transmitters in
asynchronous mode.
Port E3—When the ESAI_1 is configured as GPIO, this
signal is individually programmable as input, output, or
internally disconnected.
The default state after reset is GPIO disconnected.
Internal Pull down resistor.
This input is 5 V tolerant
Signal Description
Signal Groupings
19