EP2C5Q208C7N Altera, EP2C5Q208C7N Datasheet - Page 25

IC CYCLONE II FPGA 5K 208-PQFP

EP2C5Q208C7N

Manufacturer Part Number
EP2C5Q208C7N
Description
IC CYCLONE II FPGA 5K 208-PQFP
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet

Specifications of EP2C5Q208C7N

Number Of Logic Elements/cells
4608
Number Of Labs/clbs
288
Total Ram Bits
119808
Number Of I /o
142
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Family Name
Cyclone® II
Number Of Logic Blocks/elements
4608
# I/os (max)
142
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
4608
Ram Bits
119808
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
208
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1674

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2C5Q208C7N
Manufacturer:
ALTERA
Quantity:
45
Part Number:
EP2C5Q208C7N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
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Manufacturer:
ALTERA
0
Part Number:
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Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
February 2007
Figure 2–9. Register Chain Interconnects
The C4 interconnects span four LABs, M4K blocks, or embedded
multipliers up or down from a source LAB. Every LAB has its own set of
C4 interconnects to drive either up or down.
interconnect connections from an LAB in a column. The C4 interconnects
can drive and be driven by all types of architecture blocks, including
PLLs, M4K memory blocks, embedded multiplier blocks, and column
and row IOEs. For LAB interconnection, a primary LAB or its LAB
neighbor (see
interconnects can drive each other to extend their range as well as drive
row interconnects for column-to-column connections.
Interconnect
Adjacent LE
Carry Chain
Routing to
Figure
Local
2–10) can drive a given C4 interconnect. C4
Local Interconnect
Routing Among LEs
in the LAB
Cyclone II Device Handbook, Volume 1
LE 10
LE 16
LE 1
LE 2
LE 3
LE 4
LE 5
LE 6
LE 7
LE 8
LE 9
LE 11
LE 12
LE13
LE 14
LE 15
Figure 2–10
Register Chain
Routing to Adjacent
LE's Register Input
Cyclone II Architecture
shows the C4
2–13

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