CY8CTST200-32LQXI Cypress Semiconductor Corp, CY8CTST200-32LQXI Datasheet - Page 188

IC MCU 32K FLASH 32UQFN

CY8CTST200-32LQXI

Manufacturer Part Number
CY8CTST200-32LQXI
Description
IC MCU 32K FLASH 32UQFN
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet

Specifications of CY8CTST200-32LQXI

Program Memory Type
FLASH (32 kB)
Package / Case
32-UQFN Exposed Pad, 32-HUQFN, 32-SQFN
Applications
Touchscreen Controller
Core Processor
M8C
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
28
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Processor Series
CY8CTxx2xx
Core
M8C
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
24 MHz
Number Of Timers
3
Operating Supply Voltage
1.71 V to 5.5 V
Mounting Style
SMD/SMT
Program Memory Size
32 KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-2957
PRTxDR
21.3
The following registers are all in bank 0 and are listed in address order. An ‘x’ before the comma in the register’s address indi-
cates that the register can be accessed in Bank 0 and Bank 1, independent of the XIO bit in the CPU_F register. Registers
that are in both Bank 0 and Bank 1 are listed in address order in Bank 0. For example, the RDIxLT1 register has an address
of x,B4h and is listed only in Bank 0 but is accessed in both Bank 0 and Bank 1.
21.3.1
These registers allow for write or read access, or the current logical equivalent, of pin voltage.
The upper nibble of the PRT4DR register returns the last data bus value when read. You need to mask it off before using this
information. For additional information, refer to the
Bit
7:0
188
Individual Register Names and Addresses:
PRT0DR : 0,00h
PRT4DR : 0,10h
Access : POR
Bit Name
0,00h
Data[7:0]
Name
Bank 0 Registers
PRTxDR
Port Data Registers
7
PRT1DR : 0,04h
6
Description
Write value to port or read value from port. Reads return the state of the pin, not the value in the
PRTxDR register.
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
5
Register Definitions on page 59
PRT2DR : 0,08h
4
Data[7:0]
RW : 00
3
in the GPIO chapter.
PRT3DR : 0,0Ch
2
1
0,00h
0
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