CY8CTST200-32LQXI Cypress Semiconductor Corp, CY8CTST200-32LQXI Datasheet - Page 239

• Manufacturer Part Number: CY8CTST200-32LQXI
• Description: IC MCU 32K FLASH 32UQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: TrueTouch™r

Specifications of CY8CTST200-32LQXI

• Program Memory Type: FLASH (32 kB)
• Package / Case: 32-UQFN Exposed Pad, 32-HUQFN, 32-SQFN
• Applications: Touchscreen Controller
• Core Processor: M8C
• Controller Series: CY8CT
• Ram Size: 2K x 8
• Interface: I²C, SPI, UART/USART, USB
• Number Of I /o: 28
• Voltage - Supply: 1.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Processor Series: CY8CTxx2xx
• Core: M8C
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 24 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.71 V to 5.5 V
• Mounting Style: SMD/SMT
• Program Memory Size: 32 KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2957

21.3.51 I2C_CFG
This register is used to set the basic operating modes, baud rate, and interrupt selection.
In the table above, note that reserved bits are grayed table cells and are not described in the bit description section below.
Always write reserved bits with a value of ‘0’. For additional information, refer to the
I2C Slave chapter .
Bit
6
4
3:2
0
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
Individual Register Names and Addresses:
I2C_CFG : 0,D6h
Access : POR
Bit Name
P Select
Stop IE
Clock Rate[1:0]
Enable
Name
I
2
C Configuration Register
7
PSelect
RW : 0
6
Description
I2C Pin Select.
0
1
Note Read the I2C Slave chapter for a discussion of the side effects of choosing the P1[0] and P1[1]
pair of pins.
Stop Interrupt Enable.
0
1
00b
01b
10b
11b
0
1
P1[5] and P1[7].
P1[0] and P1[1].
Disabled.
Enabled. An interrupt is generated on the detection of a Stop condition.
100K Standard Mode.
400K Fast Mode.
50K Standard Mode.
Reserved..
Disabled.
Enabled.
5
0,D6h
Stop IE
RW : 0
4
3
Clock Rate[1:0]
RW : 0
Register Definitions on page 122
2
1
0,D6h
RW : 0
Enable
I2C_CFG
0
in the
239
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