CY7C64714-56PVXC Cypress Semiconductor Corp, CY7C64714-56PVXC Datasheet - Page 6

• Manufacturer Part Number: CY7C64714-56PVXC
• Description: IC MCU USB EZ FX1 16KB 56-SSOP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB FX1™r

Specifications of CY7C64714-56PVXC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: CY7C647xx
• Ram Size: 16K x 8
• Interface: I²C, USB, USART
• Number Of I /o: 24
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 4-5. Reset Timing Values
4.9.2
The 8051 puts itself and the rest of the chip into a power-down
mode by setting PCON.0 = 1. This stops the oscillator and
PLL. When WAKEUP is asserted by external logic, the oscil-
lator restarts, after the PLL stabilizes, and then the 8051
receives a wakeup interrupt. This applies whether or not FX1
is connected to the USB.
The FX1 exits the power-down (USB suspend) state using one
of the following methods:
The second wakeup pin, WU2, can also be configured as a
general purpose I/O pin. This allows a simple external R-C
network to be used as a periodic wakeup source. Note that
WAKEUP is by default active LOW.
Document #: 38-08039 Rev. *C
Power-On Reset with crystal
Power-On Reset with external
clock
Powered Reset
• USB bus activity (if D+/D– lines are left floating, noise on
• External logic asserts the WAKEUP pin
• External logic asserts the PA3/WU2 pin.
these lines may indicate activity to the FX1 and initiate a
wakeup).
Wakeup Pins
Condition
*SUDPTR, USB upload/download, I
200 s + Clock stability time
FFFF
E200
E1FF
E000
3FFF
0000
Data (RD#,WR#)*
Inside FX1
4K FIFO buffers
0.5 KBytes RAM
16 KBytes RAM
Code and Data
(PSEN#,RD#,WR#)*
Figure 4-3. Internal Code Memory, EA = 0
7.5 KBytes
USB regs and
(RD#,WR#)
T
200 s
5 ms
RESET
Outside FX1
(Ok to populate
data memory
here—RD#/WR#
strobes are not
active)
(OK to populate
data memory
here—RD#/WR#
strobes are not
active)
40 KBytes
External
Data
Memory
(RD#,WR#)
Data
4.10
4.10.1
The FX1 has 16 KBytes of internal program/data RAM, where
PSEN#/RD# signals are internally ORed to allow the 8051 to
access it as both program and data memory. No USB control
registers appear in this space.
Two memory maps are shown in the following diagrams:
Figure 4-3 Internal Code Memory, EA = 0
Figure 4-4 External Code Memory, EA = 1.
4.10.2
This mode implements the internal 16-KByte block of RAM
(starting at 0) as combined code and data memory. When
external RAM or ROM is added, the external read and write
strobes are suppressed for memory spaces that exist inside
the chip. This allows the user to connect a 64-KByte memory
without requiring address decodes to keep clear of internal
memory spaces.
Only the internal 16 KBytes and scratch pad 0.5 KBytes RAM
spaces have the following access:
4.10.3
The bottom 16 KBytes of program memory is external, and
therefore the bottom 16 KBytes of internal RAM is accessible
only as data memory.
• USB download
• USB upload
• Setup data pointer
• I
2
2
C interface boot access
C interface boot load.
Program/Data RAM
Size
Internal Code Memory, EA = 0
External Code Memory, EA = 1
(OK to populate
program
memory here—
PSEN# strobe
is not active)
48 KBytes
External
Code
Memory
(PSEN#)
Code
CY7C64713/14
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