MC68030RC25C Freescale Semiconductor, MC68030RC25C Datasheet - Page 529

• Manufacturer Part Number: MC68030RC25C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC25C

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

2
12.1.3 Software Differences
12-4
the occurrence of CPU space cycles since the MC68851's PAS does not assert.
The instruction cache control bits in the cache control register (CACR) of the
the CACR does not affect system operation in any way. Refer to SECTION 6
functions of the CACR bits.
When used in a system originally designed for an MC68020, a difference a
When the adapter is used in a system originally designed for the MC68020/
the MC68030 asserts RMC but not CLOUT. In simple MC68020/MC68851 sys-
tems without logical bus arbitration or logical caches, the MC68851's jumper
CLI has two connection options because some systems may use CLI to qualify
enable and data cache control. Because this adapter board does not support
synchronous bus cycles (and thus burst mode), enabling burst mode through
ON-CHIP CACHE MEMORIES for more information on the bit positions and
programmer must be aware of is that the MC68030 does not support the
CALLM and RTM instructions of the MC68020. If code is executed on the
instruction exception is taken. If no MMU software development capability
is desired and the cache behavior described under hardware differences is
supported by the MC68030 MMU are listed below:
can have the following signals connected together:
MC68030 are in the identical bit positions as the corresponding bits as the
MC68020's CACR. However, the MC68030 has additional control bits for burst
MC68030 using either the CALLM or RTM instructions, an unimplemented
understood, the user may ignore the MC68030 MMU.
MC68851 pair, the software differences described below also apply. The
MC68030's MMU offers a subset of the MC68851 features. The features not
•
• Task aliasing
• Instructions: PBcc, PDBcc, PRESTORE, PSAVE, PScc, PTRAPcc, PVALID
LAS ~ PAS
LBRO 0B PBR
LA(8-31) 40 PA(8-31)
CLI (1~ no connect or LAS
LBGI ~i PBG
LBGACK ~ PBGACK
On-chip breakpoint registers
MC68030 USER'S MANUAL
MOTOROLA