PCX7457VGH1000NC Atmel, PCX7457VGH1000NC Datasheet - Page 17

• Manufacturer Part Number: PCX7457VGH1000NC
• Description: IC MPU 32BIT 1000MHZ 483CBGA
• Manufacturer: Atmel

Specifications of PCX7457VGH1000NC

• Processor Type: PowerPC 32-Bit RISC
• Speed: 1.0GHz
• Voltage: 1.1V
• Mounting Type: Surface Mount
• Package / Case: 483-CBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

PC7457
For this example, a R
value of 2.1 C/W or less is required to maintain the die junction temper-
sa
(1)
ature below the maximum value of
“Recommended Operating Conditions
” on page
12.
Though the die junction-to-ambient and the heat sink-to-ambient thermal resistances are a com-
mon figure-of-merit used for comparing the thermal performance of various microelectronic
packaging technologies, one should exercise caution when only using this metric in determining
thermal management because no single parameter can adequately describe three-dimensional
heat flow. The final die-junction operating temperature is not only a function of the component-
level thermal resistance, but the system-level design and its operating conditions. In addition to
the component's power consumption, a number of factors affect the final operating die-junction
temperature – airflow, board population (local heat flux of adjacent components), heat sink effi-
ciency, heat sink attach, heat sink placement, next-level interconnect technology, system air
temperature rise, altitude, etc.
Due to the complexity and the many variations of system-level boundary conditions for today's
microelectronic equipment, the combined effects of the heat transfer mechanisms (radiation,
convection, and conduction) may vary widely. For these reasons, we recommend using conju-
gate heat transfer models for the board, as well as system-level designs.
For system thermal modeling, the PC7447 and PC7457 thermal model is shown in
Figure 6-2 on
page
14. Four volumes will be used to represent this device. Two of the volumes, solder ball,
and air and substrate, are modeled using the package outline size of the package. The other
two, die, and bump and underfill, have the same size as the die. The silicon die should be mod-
eled 9.64 × 11 × 0.74 mm with the heat source applied as a uniform source at the bottom of the
volume. The bump and underfill layer is modeled as 9.64 × 11 × 0.69 mm (or as a collapsed vol-
ume) with orthotropic material properties: 0.6W/(m × K) in the
y-plane and 2W/(m × K) in the
x
direction of the z-axis. The substrate volume is 25
25
1.2 mm (PC7447) or 29
29
1.2 mm
×
×
×
×
(PC7457), and this volume has 18W/(m × K) isotropic conductivity. The solder ball and air layer
is modeled with the same horizontal dimensions as the substrate and is 0.9 mm thick. It can also
be modeled as a collapsed volume using orthotropic material properties: 0.034W/(m × K) in the
xy-plane direction and 3.8W/(m × K) in the direction of the z-axis.
17
5345D–HIREL–07/06