DP8344BV National Semiconductor, DP8344BV Datasheet - Page 116

• Manufacturer Part Number: DP8344BV
• Description: IC BIPHASE COMM PROCESSR 84-PLCC
• Manufacturer: National Semiconductor

Specifications of DP8344BV

• Processor Type: 8-Bit RISC
• Speed: 20MHz
• Voltage: 4.5 ~ 5.5V
• Mounting Type: Surface Mount
• Package / Case: 84-PLCC
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Mounting: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: *DP8344BV

t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
5 0 Device Specifications
Note 1 All parameters are individually tested and guaranteed Interpreting this data by numerically adding two or more parameters to create a new timing
specification may lead to invalid results
Note 2 Two remote writes to instruction memory are necessary to store a 16-bit instruction word to IMEM low byte followed by high byte The timing for the 2nd
write is shown in the following diagram The timing of the first write is the same as a write of the PC or RIC
Note 3 The maximum value for this parameter is the latest RAE REM-WR can be removed without adding a T-state to the remote access
SU-RRW-CO
H-RRW-X
SU-CMD-RRW
H-CMD-RRW
PD-RRW-X
PD-X-LCL
PD-LCL-X
PD-RRW-LCL
AZ-AAD-LCL
ZA-LCL-AAD
PD-RDAT-I
H-RDAT-RRW
PD-LCL-IA
PD-LCL-IWR
PD-IWR-X
PD-RRW-IWR
ZA-IWR-I
AZ-IWR-I
PD-I-IWR
W-IWR
PD-I-IA
Symbol
ID
10
11
12
13
14
15
16
17
18
19
20
21
1
2
3
4
5
6
7
8
9
RAE REM-WR Falling before CLK-OUT Rising
RAE REM-WR Rising after XACK Rising (Note 3)
CMD Valid before RAE REM-WR Falling
CMD Invalid after RAE REM-WR Falling
RAE REM-WR Falling to XACK Falling
XACK Falling to LCL Rising
LCL Rising to XACK Rising
RAE REM-WR to LCL Falling
A AD Disabled before LCL Rising
A AD Enabled after LCL Falling
AD (Data) Valid to I Valid
AD (Data) Invalid after RAE REM-WR Rising
LCL Falling to next IA Valid
LCL Rising to IWR Falling
IWR Falling before XACK Rising
RAE REM-WR Rising to IWR Rising
IWR Falling to I Enabled
IWR Rising to I Disabled
I Valid before IWR Rising
IWR Low
I Disabled to IA Invalid
TABLE 5-19 Slow Buffered Write of IMEM (Notes 1 2)
(Continued)
Parameter
116
(n
(n
(n
(n
2T
Formula
T
IW
IW
IW
IW
a
T
T
a
T
T
T
T
T
a
a
a
a
H
L
T
a
a
a
a
a
T
a
a
2)T
2)T
1)T
2)T
H
H
a
a
a
a
a
a
b
b
b
b
b
b
b
Min
b
b
b
b
24
26
14
22
0
0
5
5
10
20
10
20
19
10
64
5
3
2
2
b
Max
26
30
52
8
3
34
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns