DP8344BV National Semiconductor, DP8344BV Datasheet - Page 95

• Manufacturer Part Number: DP8344BV
• Description: IC BIPHASE COMM PROCESSR 84-PLCC
• Manufacturer: National Semiconductor

Specifications of DP8344BV

• Processor Type: 8-Bit RISC
• Speed: 20MHz
• Voltage: 4.5 ~ 5.5V
• Mounting Type: Surface Mount
• Package / Case: 84-PLCC
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Mounting: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: *DP8344BV

5 1 3 DATA MEMORY INTERFACE (Continued)
Timing Control
5 1 4 TRANSCEIVER INTERFACE
5 1 5 REMOTE INTERFACE
5 1 6 EXTERNAL INTERRUPTS
ALE
READ
WRITE
DATA-IN
a
b
DATA-OUT
DATA-DLY
TX-ACT
RAE
CMD
REM-RD
REM-WR
XACK
WR-PEND
LOCK
LCL
BIRQ
NMI
5 0 Device Specifications
ALG-IN
Signal
ALG-IN
In Out
In Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
In
In
In
In
In
In
In
In
In
Pin
28
29
30
39
42
41
38
37
36
46
45
47
48
50
49
44
31
53
52
Reset
State
In
X
X
X
X
X
X
X
X
X
0
1
1
1
1
0
1
1
0
(Continued)
Address Latch Enable Demultiplexes AD bus Address should be latched on the
falling edge
Data memory READ strobe Data is latched on the rising edge
Data memory WRITE strobe Data is presented on the rising edge
Logic level serial DATA INput
Non-inverting AnaLoG INput for biphase serial data
Inverting AnaLoG INput for biphase serial data
Biphase serial DATA OUTput (inverted)
Biphase serial DATA output DeLaYed by one-quarter bit time
Transmitter ACTive Normally low goes high to indicate serial data is being
transmitted Used to enable external line drive circuitry
Remote Access Enable A ‘‘chip-select’’ input to allow host access of BCP
functions and memory
CoMmanD input When high remote accesses are directed to the Remote
Interface Configuration register RIC When low remote accesses are directed
to data-memory instruction-memory or program counter as determined by
REMote ReaD When active along with RAE a remote read cycle is requested
serviced by the BCP when the data bus becomes available
REMote WRite When active along with RAE a remote write cycle is requested
serviced by the BCP when the data bus becomes available
Transfer ACKnowledge Normally high goes low on REM-RD or REM-WR going
low (if RAE low) returning high when the transfer is complete Normally used as
a ‘‘wait’’ signal to a remote processor
WRite PENDing In a system configuration where remote write cycles are
latched indicates when the latches contain valid data which is yet to be serviced
by the BCP
The remote processor uses this input to LOCK out local (BCP) accesses to data-
memory Once the remote processor has been granted the bus LOCK gives it
sole access to the bus and BCP accesses are ‘‘waited’’
LoCaL Normally low goes high when the BCP relinquishes the data and
address bus to service a Remote Access
Bi-directional Interrupt ReQuest As an input can be used as an active low
interrupt input (maskable and level-sensitive) As an output can be used to
generate remote system interrupts reset via RIC
Non-Maskable Interrupt Negative edge sensitive interrupt input
RIC
95
Description