A80386DX33 Intel, A80386DX33 Datasheet - Page 112

• Manufacturer Part Number: A80386DX33
• Description: IC MPU 32-BIT 5V 33MHZ 132-PGA
• Manufacturer: Intel

Specifications of A80386DX33

• Processor Type: 386DX
• Features: 32-bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-PGA
• Family Name: Intel386 DX
• Device Core Size: 32b
• Frequency (max): 33MHz
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 132
• Package Type: PGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 807129

Intel386
6 2 3 3 ENCODING OF THE SEGMENT
The sreg field in certain instructions is a 2-bit field
allowing one of the four 80286 segment registers to
be specified The sreg field in other instructions is a
3-bit field allowing the Intel386 DX FS and GS seg-
ment registers to be specified
112
000
001
010
011
100
101
110
111
reg
sreg3 Field
REGISTER (sreg) FIELD
sreg2 Field
TM
Register Specified by reg Field
During 32-Bit Data Operations
3-Bit
2-Bit
000
001
010
011
100
101
110
111
00
01
10
11
DX MICROPROCESSOR
(when w
2-Bit sreg2 Field
3-Bit sreg3 Field
CH
DH
DL
AH
BH
AL
CL
BL
Function of w Field
e
0)
do not use
do not use
(when w
Segment
Selected
Segment
Register
Selected
Register
GS
ES
CS
SS
DS
DS
FS
ES
CS
SS
EAX
ECX
EDX
EBX
EBP
ESP
ESI
EDI
e
1)
6 2 3 4 ENCODING OF ADDRESS MODE
Except for special instructions such as PUSH or
POP where the addressing mode is pre-determined
the addressing mode for the current instruction is
specified by addressing bytes following the primary
opcode The primary addressing byte is the ‘‘mod
r m’’ byte and a second byte of addressing informa-
tion the ‘‘s-i-b’’ (scale-index-base) byte can be
specified
The s-i-b byte (scale-index-base byte) is specified
when using 32-bit addressing mode and the ‘‘mod
r m’’ byte has r m
When the sib byte is present the 32-bit addressing
mode is a function of the mod ss index and base
fields
The primary addressing byte the ‘‘mod r m’’ byte
also contains three bits (shown as TTT in Figure 6-1)
sometimes used as an extension of the primary op-
code The three bits however may also be used as
a register field (reg)
When calculating an effective address either 16-bit
addressing or 32-bit addressing is used 16-bit ad-
dressing uses 16-bit address components to calcu-
late the effective address while 32-bit addressing
uses 32-bit address components to calculate the ef-
fective address When 16-bit addressing is used the
‘‘mod r m’’ byte is interpreted as a 16-bit addressing
mode specifier When 32-bit addressing is used the
‘‘mod r m’’ byte is interpreted as a 32-bit addressing
mode specifier
Tables on the following three pages define all en-
codings of all 16-bit addressing modes and 32-bit
addressing modes
e
100 and mod
e
00 01 or 10