MC68360ZP25L Freescale Semiconductor, MC68360ZP25L Datasheet - Page 141
MC68360ZP25L
Manufacturer Part Number
MC68360ZP25L
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360ZP25L
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
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Once RESETH and RESETS negate, all control signals are driven to their inactive state, the
data bus is in read mode, and the address bus is driven. After this, the first bus cycle of the
reset exception processing begins.
When a RESET instruction is executed, the QUICC drives the RESETS signal for 512 clock
cycles. In this case, the QUICC resets the external devices of the system, and many of the
internal registers of the QUICC (see Section 3 QUICC Memory Map for a list of registers
affected by each type of reset).
The bus arbitration circuitry is only reset during a power-on reset. It may be used during all
other resets.
In QUICC slave mode (disable CPU32+) the reset operates the same as in the normal (mas-
ter) mode except that the RESET instruction does not exist.
RESETH
NOTES:
CYCLES
CLKO1
1. Internal start-up time.
2. SSP read here.
3. PC read here.
4. First instruction fetched here.
5. This figure is true when MODCK is 11 or 10.
LOCK
VCO
V CC
BUS
When MODCK is 01 CLKO1 will be driven high at power up.
BUS STATE
UNKNOWN
The PLL samples the MODCLK pins while in the first 512 clocks
of RESET. The process starts with RESET being asserted, then
MODCLK pins are sampled and the PLL is initialized according
to the MODCLK pins. For the next 500-2000 EXTAL cycles the
PLL is synchronizing. 512 clocks after the PLL synchronizes, the
QUICC no longer drives RESET and does not sample the MOD-
CLK pins.
User should make suer the ramp up time of Vcc will never be
faster than 4mSec to ensure proper power on reset sequence.
Figure 4-47. Initial Reset Operation Timing
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
CLKOUT
512
CONTROL SIGNALS
THREE-STATED
ADDRESS AND
NOTE
14 CLOCKS
1
2
Bus Operation
3
4
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