MC68360ZP25L Freescale Semiconductor, MC68360ZP25L Datasheet - Page 607
MC68360ZP25L
Manufacturer Part Number
MC68360ZP25L
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360ZP25L
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
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DM—Diagnostic Mode
TEN—SMC Transmit Enable
REN—SMC Receive Enable
7.11.7.12 SMC UART RECEIVE BUFFER DESCRIPTOR (RX BD). •The CP reports infor-
An example of the UART Rx BD process is shown in Figure 7-76. This figure shows the
resulting state of the Rx BDs after receipt of 10 characters, an idle period, and five charac-
ters—one with a framing error. The example assumes that MRBLR = 8 in the SMC param-
eter RAM.
E—Empty
Bits 14, 11, 10, 7, 6, 2—Reserved
1. Detection of an error during message processing
2. Detection of a full receive buffer
3. Reception of a programmable number of consecutive idle characters
OFFSET + 0
OFFSET + 2
OFFSET + 4
OFFSET + 6
NOTE: Entries in boldface must be initialized by the user.
00 = Normal operation
01 = Local loopback mode
10 = Echo mode
11 = Reserved
0 = SMC transmitter disabled
1 = SMC transmitter enabled
0 = SMC receiver disabled
1 = SMC receiver enabled
mation concerning the received data on a per-buffer basis via Rx BDs. The CP closes
the current buffer, generates a maskable interrupt, and starts to receive data into the
next buffer after one of the following events:
0 = The data buffer associated with this Rx BD has been filled with received data, or
1 = The data buffer associated with this BD is empty, or reception is currently in
data reception has been aborted due to an error condition. The CPU32+ core is
free to examine or write to any fields of this Rx BD. The CP will not use this BD
again while the E-bit remains zero.
progress. This Rx BD and its associated receive buffer are owned by the CP. Once
the E-bit is set, the CPU32+ core should not write any fields of this Rx BD.
15
E
14
—
13
Freescale Semiconductor, Inc.
W
For More Information On This Product,
12
I
MC68360 USER’S MANUAL
Go to: www.freescale.com
11
—
10
—
CM
RX DATA BUFFER POINTER
9
DATA LENGTH
ID
8
—
7
Serial Management Controllers (SMCs)
—
6
BR
5
FR
4
PR
3
—
2
OV
1
CD
0
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