MC68360ZP25L Freescale Semiconductor, MC68360ZP25L Datasheet - Page 248
MC68360ZP25L
Manufacturer Part Number
MC68360ZP25L
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360ZP25L
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
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System Integration Module (SIM60)
Bus Monitor
On the MC68302, this function is called the hardware watchdog.
Double Bus Fault Monitor
6-4
The SIM60 provides a bus monitor to monitor the data and size acknowledge (DSACK)
response time for all bus accesses (internal-to-internal, internal-to-external, external-to-
internal, and external-to-external). Four selectable response times allow for variations in
response speed of memory and peripherals used in the system. A bus error signal is as-
serted if the DSACK response limit is exceeded. This function can be disabled.
The double bus fault monitor causes a reset to occur if the internal HALT signal is assert-
ed by the CPU32+, indicating a double bus fault. A double bus fault results when a bus or
address error occurs during the exception processing sequence for a previous bus or ad-
dress error, a reset, or while the CPU32+ is loading information from a bus error stack
frame during an RTE instruction. This function can be disabled. See Section 4 Bus Oper-
ation for more information.
4 KB
4 KB
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 6-1. QUICC Memory Map
REGISTERS
INTERNAL
MC68360 USER’S MANUAL
Go to: www.freescale.com
NOTE
REGB (REGISTER BASE) = DPRBASE + 4K
DPRBASE (DUAL-PORT RAM BASE)
DUAL-PORT RAM
MBAR (SIM60)
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