FW80200M733SL678 Intel, FW80200M733SL678 Datasheet - Page 13

• Manufacturer Part Number: FW80200M733SL678
• Description: IC I/O PROCESSOR 733MHZ 241-BGA
• Manufacturer: Intel

Specifications of FW80200M733SL678

• Rohs Status: RoHS non-compliant
• Processor Type: I/O
• Features: XScale Core
• Speed: 733MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 241-BGA
• Other names: 844850

Datasheet - Commercial and Extended Temperature (80200T)
3.0
3.1
3.1.1
3.1.1.1
Table 2.
Package Information
Package Introduction
The Intel
“241-Lead PBGA Package” on page
Functional Signal Definitions
This section defines the pins and signals in the following tables:
Signal Pin Descriptions
Pin Description Nomenclature
•
•
•
•
Symbol
Table 2 “Pin Description Nomenclature” on page 13
Table 3 “Power Pins” on page 14
Table 4 “Signal Pin Description” on page 14
Table 5 “JTAG Pins” on page 16
Rst(...)
Hld(...)
Slp(...)
N/C
I/O
O
-
I
®
80200 processor is offered in a Plastic Ball Grid Array (PBGA) package. See
Input pin only
Output pin only
Pin can be either an input or output
Pin must be connected as described
NO CONNECT. Do not make electrical connections to these balls.
While the RESETOUT# pin is asserted, the pin:
Since RESET# is asynchronous, these are asynchronous events.
While the Intel
Note: When both HLDA and RESETOUT# are asserted, then HOLD mode takes priority; the
output pins assume the state specified by Hld(...). The HOLD pin is also honored during Idle
and Sleep modes; the output pins assume the state specified by Hld(...).
While the Intel
• Rst(1) Is driven to Vcc
• Rst(0) Is driven to Vss
• Rst(X) Is driven to unspecified state (1 or 0, buses may contain a mix of 1 and 0 signals)
• Rst(H) Is pulled up to Vcc
• Rst(L) Is pulled down to Vss
• Rst(Z) Floats
• Rst(Q) Is a valid output
• Hld(Z) Floats
• Hld(Q) is a valid output
• Hld(1) is driven to Vcc
• Slp(1) Is driven to Vcc
• Slp(0) Is driven to Vss
• Slp(X) Is driven to unspecified state
• Slp(Q) Is a valid output
Intel
®
®
®
80200 processor is in HOLD mode (HOLD asserted and took effect), the pin:
80200 processor is in Idle or Sleep mode (software selected), pin:
80200 Processor based on Intel
17.
Description
January 2003
®
XScale
Package Information
™
Microarchitecture
Figure 2
13