FW80200M733SL678 Intel, FW80200M733SL678 Datasheet - Page 5

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FW80200M733SL678

Manufacturer Part Number
FW80200M733SL678
Description
IC I/O PROCESSOR 733MHZ 241-BGA
Manufacturer
Intel
Datasheet

Specifications of FW80200M733SL678

Rohs Status
RoHS non-compliant
Processor Type
I/O
Features
XScale Core
Speed
733MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
241-BGA
Other names
844850

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Datasheet - Commercial and Extended Temperature (80200T)
1.0
Table 1.
2.0
About this Document
This is the Advance Information data sheet for the Intel
microarchitecture (ARM* architecture compliant). This data sheet contains a functional overview,
mechanical data (package signal locations and simulated thermal characteristics), targeted
electrical specifications (simulated), and bus functional waveforms. Detailed functional
descriptions other than parametric performance is published in the Intel
on Intel
Related Documentation
Functional Overview
The Intel
architecture (ISA). The Intel
production semiconductor process technology. This process technology, along with the
compactness of the ARM RISC ISA, enables the Intel
speed/power range, producing industry-leading mW/MIPS performance.
Intel
Intel
Intel
Intel
Intel
Intel
7-8 stage Superpipeline promotes high speed, efficient core performance
128-entry Branch Target Buffer keeps pipeline filled with statistically correct branch choices
32-entry Instruction Memory Management Unit for logical-to-physical address translation,
access permissions, I-Cache attributes
32-entry Data Memory Management Unit for logical-to-physical address translation, access
permissions, D-Cache attributes
32 KB Instruction Cache can hold entire programs, preventing core stalls caused by multicycle
memory accesses
32 KB Data Cache reduces core stalls caused by multicycle memory accesses
2 KB Minidata Cache for frequently changing data streams avoids “thrashing” of the D-Cache
4-entry Fill and Pend Buffers promote core efficiency by allowing “hit-under- miss” operation
with Data Caches
Power Management Unit gives power savings via idle, and sleep modes
8-entry Write Buffer allows the core to continue execution while data is written to memory
Multiply-Accumulate Coprocessor can do two simultaneous 16-bit SIMD multiplies with
40-bit accumulation for efficient, high quality audio
®
®
®
®
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80312 I/O Companion Chip Developer’s Manual
80312 I/O Companion Chip Datasheet
80312 I/O Companion Chip Specification Update
80200 Processor based on Intel
80200 Processor based on Intel
80310 I/O Processor Chipset Design Guide
®
®
XScale
80200 processor technology is compliant with the ARM* Version 5TE instruction set
Microarchitecture Developer’s Manual.
Intel
®
®
80200 processor is designed with Intel state-of-the-art 0.18 micron
80200 Processor based on Intel
Document Title
®
®
XScale
XScale
Microarchitecture Developer’s Manual
Microarchitecture Specification Update
®
®
80200 processor based on Intel
80200 processor to operate over a wide
January 2003
®
XScale
®
80200 Processor based
About this Document
Microarchitecture
Document #
®
273415
273354
273410
273425
273416
273411
XScale
5

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