IDTSTAC9751XXTAEC1XR IDT, Integrated Device Technology Inc, IDTSTAC9751XXTAEC1XR Datasheet - Page 23

no-image

IDTSTAC9751XXTAEC1XR

Manufacturer Part Number
IDTSTAC9751XXTAEC1XR
Description
IC CODEC AC'97 2CH VALUE 48-LQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Audio Codec '97r
Datasheet

Specifications of IDTSTAC9751XXTAEC1XR

Resolution (bits)
18 b, 20 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
Yes
S/n Ratio, Adcs / Dacs (db) Typ
85 / 89
Voltage - Supply, Analog
3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
STAC9751XXTAEC1XR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDTSTAC9751XXTAEC1XR
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
IDT™
VALUE-LINE TWO-CHANNEL AC’97 CODECS
STAC9750/9751
VALUE-LINE TWO-CHANNEL AC’97 CODECS
SDATA_OUT’s composite stream is MSB justified (MSB first) with all non-valid slots’ bit positions
stuffed with 0s by the AC'97 controller.
When mono audio sample streams are sent from the AC'97 controller, it is necessary that BOTH left
and right sample stream time slots be filled with the same data.
5.1.1.1.
The command port is used to control features and monitor status (see Audio Input Frame Slots 1
and 2) of the STAC9750/9751 functions including, but not limited to, mixer settings and power man-
agement (refer to the Control Register section of this specification).
The control interface architecture supports up to sixty-four 16-bit read/write registers, addressable
on even byte boundaries. Only the even registers (00h, 02h, etc.) are valid. Odd accesses are con-
sidered invalid and return 0000h.
Audio output frame slot 1 communicates control register address and write/read command informa-
tion to the STAC9750/9751.
The first bit (MSB) sampled by STAC9750/9751 indicates whether the current control transaction is a
read or a write operation. The following 7 bit positions communicate the targeted control register
address. The trailing 12 bit positions within the slot are Reserved and must be stuffed with 0s by the
AC'97 controller.
18:12
11:0
Bit
19
Slot 1: Command Address Port
S D A T A _ O U T
Control Register Index
Read/Write command
Figure 13. Start of an Audio Output Frame
B I T _ C L K
E n d o f p r e v i o u s a u d i o f r a m e
Description
Reserved
S Y N C
Table 11. Command Address Port Bit Assignments
23
1= read, 0=write
Sixty-four 16-bit locations, addressed on even byte boundaries
Stuffed with 0s
a s s e r t e d
S Y N C
F r a m e
v a l i d
s l o t 1
S D A T A _ O U T
b i t o f f r a m e
f i r s t
s l o t 2
STAC9750/9751
Comments
PC AUDIO
V 5.8 103106

Related parts for IDTSTAC9751XXTAEC1XR